Ultra-Low-Power Deeply Embedded RISC-V Processor
TSMC CLN7FF 7nm Clock Generator PLL - 800MHz-4000MHz
High-Performance AES-GCM/CTR IP
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 40ULP
Frontgrade Gaisler and wolfSSL Collaborate to Enhance Cybersecurity in Space Applications
Alphawave IP Response to announcement from Qualcomm
VeriSilicon Launches ISP9000: The Next-Generation AI-Embedded ISP for Intelligent Vision Applications
What tamper detection IP brings to SoC designs
RISC-V in 2025: Progress, Challenges,and What's Next for Automotive & OpenHardware
Understanding MACsec and Its Integration
Addressing supply chain vulnerabilities and the advantages of Root of Trust on Ask the Experts
Cadence Unveils the Industry's First eUSB2V2 IP Solutions
ReRAM-Powered Edge AI: A Game-Changer for Energy Efficiency, Cost, and Security
I’m super excited to announce we certified our 10 Gigabit per second USB 3.1 Gen 2 controller and PHY IP. (One month ago.) (When Mick blogged about it right here)
It’s exciting for us to be first (again) for USB 3.1 as we have been first with
For our customers, it means LOWER RISK with certified IP.
Click here to read more ...
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