Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
Fast Track to a reconfigurable ASIC designSemiWiki - Don DingeeApr. 27, 2016 |
Licensing IP can be a pain, especially when the vendor's business model has front-loaded costs to get started. Without an easy way to evaluate IP, justifying a purchase may be tough. With more mid-volume starts coming for the IoT, wearables, automotive, and other application segments, it's a growing concern. Flex Logix is doing something to help.
Perhaps the offering Flex Logix is launching was motivated in part by ARM and their DesignStart program. Under ARM DesignStart, developers can get a Cortex-M0 processor core to evaluate for free, coupled with a "fast track" $40K license when the design is ready for production use. ARM recognizes that although their processor IP is widely fielded, there are a lot of new prospects coming in from these newer application segments looking for a low-end core who may not be able to afford a big up-front license hit. (It will be interesting to see if ARM expands this program beyond just the Cortex-M0 core.)
Flex Logix has decided to adopt the same Fast Track name for their introductory licensing program, with some different parameters but a very similar intent. We've described how the Flex Logix EFLX cores provide point reconfigurability with programmable logic that can be added into an ASIC design. There are two strong benefits to this, besides the BOM elimination of an external FPGA or use of an expensive programmable SoC from one of the FPGA vendors.
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