Industry Expert Blogs

We are capturing our memories in high-definition with the latest multi-mega pixel cameras and playing back with the high resolution displays. This has led to a tremendous increase in data transfer and bandwidth requirements between peripherals and application processor in a mobile SoC. It’s challenging to support advanced multimedia features in the mobile phones by integrating mega-pixel cameras and superior resolution displays at a reduced cost and power consumption.

To overcome these limitations, D-PHY was defined which brought standardization and improved inter-operability and resolved the challenging requirements of higher bandwidth and reduced power and cost. Unlike many of the existing interfaces, D-PHY is unique because it can switch between high speed and low power mode in real time depending on the need to transfer large amounts of data or to conserve power to prolong the battery life. With the increase in DPHY supported data rates up to 4.5Gbps in latest specifications, it is possible to send high bandwidth data over fewer lanes reducing the chip area and number of interface pins. Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) are the two packet-based high level protocols that carry image data between the peripheral and the application processor. Both of these protocols use D-PHY at physical layer.

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