Industry Expert Blogs
HBM controller IP holds the key to bandwidthSemiWiki - Don DingeeJul. 01, 2016 |
We were waiting to see what a different roster including SK Hynix and Synopsys would have to say on HBM in the latest Open Silicon webinar. This event focused on HBM bandwidth issues; a packaging session on 2.5D interposers was promised for a future webinar.
For their part, the SK Hynix story on HBM is the same. GDDR5X parts (from Micron) are just hitting the ground, fitting into the external memory model the industry is used to. Breaking that model with HBM2 and multi-die packaging can blow GDDR5X away in theoretical bandwidth with some attention to details.
Search Silicon IP
Related Blogs
- Ecosystem Collaboration Drives New AMBA Specification for Chiplets
- Mitigating Side-Channel Attacks In Post Quantum Cryptography (PQC) With Secure-IC Solutions
- Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops
- Gen Z Agenda Puts Premium on Batter Life and Power Conservation
- ARM vs RISC-V: Beginning of a new era