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The Impact of PCIe 4.0 Specification for DesignersSemiWiki - Eric EsteveFeb. 07, 2017 |
PCIe IP, back in 2004, was my first contact with this amazing world of IP, at least the first on this side of the game, the IP vendor side. I was lucky in that sense that, if I had to learn about this serial, dual-simplex differential protocol, it was also new for the rest of the industry! That makes now more than 12 years that PCI Express is used in the semiconductor industry. If the protocol has been initially defined to be used inside a PC (to replace PCI-X and PCI) or a workstation, the adoption in other industry segments like test equipment or embedded has gone fast.
In fact, in 2017, PCIe is prevalent in designs for storage and cloud computing, but also in mobile and automotive. In the meantime, the specification has moved from 2.5 GT/s for PCIe 1.0 to 16 GT/s for PCIe 4.0 (draft 0.7 has been released in November 2016). Even if the word “draft” may be scary, it’s important to notice that Draft 0.7 is a complete draft and that no functional change is allowed anymore. Moreover, electrical specifications have been validated via test silicon, and two independents implementation were provided to PCI-SIG workgroup members, one from Synopsys, and the other from Mellanox.
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