Industry Expert Blogs
SerDes signal integrity challenges at 28Gbps and beyondRambus BlogMar. 29, 2017 |
Maintaining signal integrity has become increasingly difficult for SerDes designers at 28Gbps, 56Gbps and beyond. After nearly fifty years, NRZ technology continues to pose significant challenges as data rates approach 56Gbps and refreshed standards mandate increased receiver sensitivity (down to 35 mV).
With shorter unit intervals and closing eyes, triggering becomes ever more complex and requires enhanced receiver equalization such as continuous-time-linear equalization and decision feedback equalization to correct. In addition, channel loss and reflections (noise) at increased data rates and noise complicate forward error correction.
Related Blogs
- Alphawave Semi Elevates AI with Cutting-Edge HBM4 Technology
- Speed Thrills: How eMMC 5.1's Command Queuing Boosts Performance
- Exploring the XSPI PHY: Technical Characteristics, Architectural Challenges, and Arasan Chip Systems' Solution
- Mitigating Side-Channel Attacks In Post Quantum Cryptography (PQC) With Secure-IC Solutions
- Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops