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400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
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56G 7nm SerDes: Eye-Witness AccounteSilicon Blog - Mike Gianfagna, eSiliconOct. 01, 2018 |
High-performance SerDes represents critical enabling technology for advanced ASICs. This star IP block finds application in many networking and switching designs as well as other high-performance applications. So, when a new high-performance SerDes block hits the streets, it’s real news. eSilicon has been enjoying the spotlight on such an event. We recently announced silicon validation of our 7nm, 56G long-reach SerDes. We were happy to report in that announcement: “lab measurements confirm that the design is meeting or exceeding the target performance, power and functionality.” Anyone who has plugged a new and complex chip into a test fixture for the first time knows what this feels like.
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