Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
Gary Patton: A Focus on New Dimensions of InnovationGLOBALFOUNDRIES Foundry Files Blog - Gary Dagastine,GFOct. 29, 2018 |
Whenever a company announces a major strategy shift and restructuring, as GF did in pivoting away from 7nm FinFET technology development, it’s understandable that confusion, uncertainty and misunderstandings may arise.
The best way to allay these concerns is to take an objective look at the situation: Demand for chips for the automotive, IoT, mobility and data center/wireless infrastructure markets is growing strongly. That opens up many new opportunities to leverage GF’s broad portfolio of existing, proven technologies by tailoring, or differentiating, them specifically for these markets. In addition, many potential clients in these areas are startups or non-traditional firms that can benefit from GF’s expanding service offerings. Stepping off the hugely expensive FinFET scaling treadmill, therefore, lets GF redeploy its resources to better pursue these opportunities.
Dr. Gary Patton, GF’s Chief Technology Officer and Senior Vice President of Worldwide Research and Development, explained these industry dynamics and discussed GF’s technology strategy in a keynote talk recently at the Global Semiconductor Alliance (GSA) Silicon Summit East 2018 forum in Saratoga Springs, NY. The Foundry Files sat down with him afterward to learn more.
Related Blogs
- Extending Arm Total Design Ecosystem to Accelerate Infrastructure Innovation
- Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops
- ARM vs RISC-V: Beginning of a new era
- Mitigating Side-Channel Attacks In Post Quantum Cryptography (PQC) With Secure-IC Solutions
- Ecosystem Collaboration Drives New AMBA Specification for Chiplets