Industry Expert Blogs
The Complexity of Hardware Debugging - Part #1Ceva's Experts blog - Ariel Hershkovitz, CevaFeb. 18, 2019 |
Introduction
In our day-to-day lives, we don’t notice the complex silicon chips at the heart of our most-used devices – they are usually well hidden inside. The chips’ capabilities, on the other hand, are very noticeable: they enable us to take high-quality photos with our phones, alert us to pedestrians when driving and to detect and recognize the commands we issue to our virtual assistants. In this post series, I want to focus on the challenges involved in verifying chip functionality.
There is a hidden army of talented people – researchers, hardware architects, hardware designers, software developers, integrators, and quality assurance engineers – who ensure that every chip in your slick-looking device works smoothly and as advertised, under all possible circumstances. These people must coordinate their efforts, even when oceans and time zones separate them. Their task is to guarantee that the different pieces of the puzzle fit together perfectly and that, out of the multitude of software code lines and hardware logic blocks, the required functionality works smoothly to meet consumer expectations. One of the biggest challenges in implementing those chips functionality lies at the boundary between the software and the hardware.
Related Blogs
- Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops
- Mitigating Side-Channel Attacks In Post Quantum Cryptography (PQC) With Secure-IC Solutions
- Digitizing Data Using Optical Character Recognition (OCR)
- Obsolete & EOL Parts
- Moortec "Let's Talk PVT Monitoring" Series with CTO Oliver King