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Aeonic Generate Digital PLL for multi-instance, core logic clocking
Industry Expert Blogs
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32G Multi-Protocol SerDes PHY Out the GateRambus BlogFeb. 25, 2019 |
Hemant Dhulla, vice president and general manager of IP Cores at Rambus says that the newly announced 28G and 32G SerDes from Rambus “will be critical to 5G infrastructure, wireless base stations and remote radio heads, autonomous vehicles, data center optical switches and highly anticipated technologies like artificial intelligence and machine learning inferencing, smart cities, and more. “By developing our high-speed interfaces on GLOBALFOUNDRIES 22nm FD-SOI (22FDX®) platform, we are able to deliver the high performance alongside reduced power and area required for these applications.”
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