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RISC-V and Arm - signs of an open heterogeneous worldUltraSoC Blog - Andy Gothard, UltraSoCDec. 19, 2019 |
I’m back in San Jose for the second time in just a couple of months, it’s been interesting to compare the two events I’ve attended here recently – Arm Techcon and the 2019 RISC-V Summit.
The worlds of RISC-V and Arm have often in the last couple of years tried to pretend that they’re hermetically sealed, separate environments. But increasingly, it’s becoming clear that nothing could be further from the truth.
At UltraSoC we’ve been aware for some time that the future is heterogeneous. For RISC-V, that means coexisting with, rather than replacing, Arm, and taking a more holistic, system-level view of the ecosystem.
And after this year’s TechCon, it seems that ‘heterogeneous’ will also be taking on a new meaning. For a long time, the techie in-joke was that for Arm, ‘heterogeneous computing’ meant a chip with an M3 and A9 on the same die (for those not in the know, the M3 and A9 are both Arm processors). But the big news back in October was Arm’s announcement that it is opening up its instruction set so that people can add custom instructions.
