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Demonstrating PCIe 6.0 Equalization ProcedureCadence Blog - Mrana, CadenceDec. 20, 2022 |
The Link equalization procedure enables components to adjust the Transmitter and the Receiver setup of each Lane to improve the signal quality and meet the requirements, when operating at 8.0 GT/s and higher data rates. All the Lanes that are associated with the LTSSM (i.e., those Lanes that are currently operational or may be operational in the future due to Link Up-configure) must participate in the Equalization procedure.
Components must arrive at the appropriate Transmitter setup for all the operating conditions and data rates they will encounter.
The equalization procedure can be initiated either autonomously or by software. It is strongly recommended that components use the autonomous mechanism. However, a component that chooses not to participate in the autonomous mechanism must have its associated software to ensure that the software-based mechanism is applied.
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