55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
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Rambus Joins Arm Total DesignRambus BlogOct. 20, 2023 |
Generative AI and other advanced workloads bring even greater urgency to accelerate the power of computing. Training models are scaling by an incredible 10X per year, with the largest now , and are showing no sign of slowing. At the same time, AI inference is pushing out from the data center to millions and ultimately billions of increasingly powerful AI-enabled edge and end point devices. The pressure grows to design and deliver the enabling SoCs for this new reality with greater efficiency and faster time to market.
Arm Total Design brings together ecosystem partners from across the industry committed to frictionless delivery of custom SoCs based on the Arm Neoverse Compute Subsystems (CSS). Neoverse CSS provides Arm technology in a new way, delivering pre-integrated and pre-verified solutions which lower the cost of development and speed time to market. Members of the Arm Total Design ecosystem – IP suppliers, ASIC design houses, EDA tool providers, foundries, and firmware developers – are working together to accelerate and simplify the development of Neoverse CSS-based systems.
“Arm Total Design will empower the entire industry to innovate around Neoverse CSS and build custom silicon optimized for specific use cases including AI, cloud, networking and the edge,” said Mohamed Awad, senior vice president and general manager, Infrastructure Line of Business at Arm. “Rambus brings unique expertise with its industry-leading interface and security IP and will enable collaboration across the broader ecosystem to accelerate the implementation of more specialized solutions.”
As a leading provider of Silicon IP, Rambus is proud to be part of the Arm Total Design ecosystem. “As the complexity of high-performance silicon for data center compute and infrastructure networks continues to rise to meet the needs of advanced workloads, it’s critical that the ecosystem works together to ease the implementation of these advanced chips,” said Neeraj Paliwal, GM of Silicon IP at Rambus. “We’re proud to be part of Arm Total Design to help accelerate our customers’ timeline to production silicon by supplying them with best-in-class high performance interface controller and security IP designs.”
The Rambus Silicon IP portfolio provides the performance and security needed for advanced computing workloads whether in the heart of the data center, at the edge or in endpoint devices. Our interface IP portfolio includes a full suite of high-performance memory controller IP for HBM, GDDR, LPDDR and DDR, as well as digital controllers for PCIe, CXL and MIPI high-speed interconnects. The Rambus security IP offering is the industry’s broadest with security IP solutions that protect hardware and data across the entire semiconductor life cycle.
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