Industry Expert Blogs

The need for higher processing power and lower power consumption are driving processors and System on Chip (SoC) to more advanced lower process nodes. For SoCs operating at 1.2V supply that are suitable for mobile phones, tablets, and laptops, using USB2 interfaces is a challenge as it becomes difficult to support 3.3V IO cells. A low voltage USB2.0 solution is therefore required to address the gap.

The embedded USB2 (eUSB2) Physical Layer Supplement to the USB 2.0 Specification was created to address the need for a low voltage, power-efficient USB 2.0 PHY solution. It eliminates the need for 3.3V IO signaling in small process technologies.

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