Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5)
Industry Expert Blogs
From TSMC A16 and Multi-Physics Flows to Photonics and AI-Driven Design Migrations: Synopsys Receives Multiple TSMC Partner of the Year AwardsSynopsys Blog - SynopsysOct. 24, 2024 |
In the rapidly evolving world of semiconductor technology, Synopsys and Taiwan Semiconductor Manufacturing Company (TSMC) are at the forefront, pushing the boundary of what is possible and driving innovation and efficiency in chip design. Our longstanding collaboration with TSMC has spurred countless industry advancements, from smaller process nodes to higher levels of systems integration. And our recent innovations in chip design infrastructure, migration, and IP – spanning digital and analog, RF, multi-physics, multi-die, and photonics – led to Synopsys being named TSMC Open Innovation Platform® (OIP) Partner of the Year in several categories at the 2024 TSMC OIP Ecosystem Forum:
- Joint Development of TSMC A16 and N2P Design Infrastructure: We developed certified, AI-driven digital and analog flows – powered by Synopsys.ai – for TSMC’s N2P processes. The production-ready design flows to help our mutual customers significantly enhance productivity and deliver optimized performance, power, and area results for the most advanced technologies. The new backside power delivery on TSMC’s A16 process sets new standards for efficient power distribution and system performance.
- RF Design Migration Solutions: We partnered with Ansys and Keysight to create an AI-driven solution for migrating RF and mmWave IP from TSMC N16FFC to N6RF+ technology. The integrated solution combines Synopsys Custom Compiler, ASO.ai, PrimeSim, AI powered implementation of Ansys RaptorX , and Keysight RFPro, helping customers accelerate node migration and achieve new performance targets for advanced wireless applications.
- Multi-Physics Solutions: Working with TSMC and Ansys, we developed a multi-physics flow for advanced TSMC package technologies like CoWoS, InFO, System on Wafer (SoW), and TSMC-SoIC. The new flow played a key role in the successful test chip tapeout of a multi-die design in the CoWoS-S advanced package, showcasing unmatched performance and reliability.
- Joint Development of COUPE Design Solutions: We collaborated with TSMC on an end-to-end electronic and silicon photonics reference flow for TSMC’s COUPE technology. Using the Synopsys 3DIC Compiler platform, the flow simplifies the integration of EIC-PIC designs and achieves higher transmission bandwidth, lower latency, and better power efficiency.
- Interface IP: We’ve been working closely with TSMC for decades to produce the highest quality IP on the industry’s most advanced process technologies. Our most recent interface IP for TSMC’s 2nm and 3nm process technologies provides a new competitive edge for chip designers looking to accelerate time to first-pass silicon success.
Related Blogs
- Extending Arm Total Design Ecosystem to Accelerate Infrastructure Innovation
- Ecosystem Collaboration Drives New AMBA Specification for Chiplets
- Driving Connectivity and Communication Exploring the Synergy of CAN XL and Ethernet IP in Automotive Applications
- Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops
- Alphawave Semi Tapes Out Industry-First, Multi-Protocol I/O Connectivity Chiplet for HPC and AI Infrastructure