CPF Based Verification of an SoC - Lessons Learnt

By Baris Guven, Levent Cetrez (Ericsson Microelectronics Design Center)

Abstract

Power Management keeps being a very valuable asset for mobile applications. CPF (Common Power Format) is a common file format to describe the power structure of the design in the early design stages that makes it a very critical design step input of the VLSI design flow. It is possible to verify a design from low power point of view using lint tools [1,2] and/or simulations without CPF, but not as effective as a CPF based simulation methodology. The aim of this paper is to introduce different design architectures to illustrate how CPF based verification works and points out the strengths and weaknesses of the methodology. All architecture examples mentioned in the paper are taken from a real SoC design that is produced and verified to be working on silicon.