Metric Driven Verification of Reconfigurable Memory Controller IPs Using UVM Methodology for Improved Verification Effectiveness and Reusability

By Gopakumar G, Chaithanya B.S, Deepu Krishnan, Krishnakumar Rao, Biju Oommen (Centre for Development of Advanced Computing)

Biography

Gopakumar.G, Engineer, Centre for Development of Advanced Computing (CDAC), holds a bachelors degree in Electronics and communication Engg from University of Kerala, India. Worked for 2 years as Mixed signal Design Engineer in Fujistu ODC under Network Systems & Technologies, India. For past 6 years working as Scientist/Engineer in CDAC. The area of expertise includes Digital ASIC design, Verification IP design and High speed PCB design.

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Metric Driven Verification of Reconfigurable Memory Controller IPs Using UVM Methodology for Improved Verification Effectiveness and Reusability

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