ARM prepares Tiger libraries to enhance next processor

In a conference call to financial analysts East said that initial deliverables had been made to ARM's Tiger partners in the first quarter of 2005. Later East confirmed that the deliverables were high-level models of the Tiger processor to allow performance modeling and profiling of software.

Tiger has been in design for about two years as a superscalar machine targeted at the 65-nm manufacturing process node, although it will probably be implemented in 90-nm manufacturing processes first. At the same time the processor is intended to let ARM break through the gigahertz clock frequency threshold that has until now has been the preserve of PC and server microprocessors

In response to a question from an analyst about progress developing cell libraries and memory compilers for 65-nm manufacturing processes at Artisan Components Inc., now integrated within ARM as the Physical Intellectual Property Division (PIPD), East said: "We need to invest more than has been invested in the past." With regard to development progress with ARM's next generation processor East said Tiger libraries would be delivered later this year.

In a subsequent telephone interview East told EE Times: "We've chosen to develop a library especially for Tiger." It would enhance performance, reduce power and allow superior trade-offs compared with other libraries because the Tiger libraries are being developed with a view to enhancing Tiger, East said. "They are at the same level of abstraction [as other cell libraries] with some specialized cells, which will allow you to implement Tiger better," East said.

East said the Tiger cell libraries are optional. They are not usually required by ARM's lead partners or other sophisticated integrated circuit makers, as they have these companies often have their own similar specialized libraries, but the Tiger libraries would give other chipmakers and licensees two options, which could encourage the broad uptake of the Tiger processor, East said. ARM would charge more for the Tiger libraries as they provide added value, East added.

East said the Tiger libraries are being developed both within the PIPD and within ARM's processor group, something made easier by ARM's recent acquisition of Artisan. East declined to say how the Tiger libraries would differ from conventional cell libraries targeted at particular manufacturing processes.

One possibility is that ARM is working with Arithmatica Inc. (Menlo Park, Calif.) a startup company that offers to improve chip performance through its innovations in mathematical circuit blocks. Arithmatica has licensed its CellMath technology to both NVidia Corp. and Xilinx Inc. and has said that its technology is being targeted at a 65-nm manufacturing process, with an un-named partner (see Feb. 3, 2005 story). Intrinsity Inc. (Austin, Texas) has developed technology which it claims has a similar performance-enhancing effect (see Jan. 14, 2005 story).

ARM tipped plans for another processor, called Serval-E, alongside Tiger on a road-map style chart, during the conference call for financial analysts three months before (see Jan. 26, 2005 story) with both marked as being adherents to the ARMv7 instruction set architecture. Serval-E is intended for embedded applications but it is not clear whether the Tiger libraries would be applicable to Serval-E development.