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Synfora introduces Aspen architecture
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| EE Times: Synfora introduces Aspen architecture | |
| Dylan McGrath (04/19/2005 8:54 PM EDT) URL: http://www.eetimes.com/showArticle.jhtml?articleID=160905423 | |
| SAN FRANCISCO — Synfora Inc. has introduced a configurable embedded processor designed to drive application engines that implement key functionality in system-on-chips (SoCs). Synfora said the configurable embedded processor, known as the Aspen architecture, would be a major component of the company's second applications engine synthesis product, which is due out sometime this year. In March 2004, Synfora (Mountain View, Calif.) introduced its first applications engine synthesis tool, Pico Express, calling it the industry's first "algorithm-to-tapeout" synthesis tool. The Pico Express technology is based on Hewlett Packard Co.'s research labs' Program In, Chip-Out (Pico) project. Synfora said application engine synthesis is designed for the complex algorithms typically found in multimedia, imaging, wireless and security applications. Applications engine synthesis willleverage the Aspen processors, integrated with networks of hardware accelerators, to cut the cost and time required for SoC design by at least 50 percent, the company said. The company said the initial release of the Aspen architecture would support a wide range of capabilities across many applications with different power, price and performance points. "The Aspen architecture represents a major milestone in Synfora's development of application engine synthesis for SoC and system-level design," said Synfora CEO Simon Napper, in a statement. Synfora plans a demonstration of the Aspen architecture during the upcoming Design Automation Conference, June 13-17, in Anaheim, Calif.
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