English
PLDA Announces Immediate Availability of the PCI Express EZ IP Module
San Jose, California May 2, 2005 — PLD Applications today announced the immediate availability of the PCI Express EZ IP Module for its PCI Express IP Core.
The EZ IP Module is targeted to PCI designers making the shift to PCI Express and to experienced PCI Express designers looking for a robust yet simple PCI Express interface.
"PLDA is launching a suite of PCI Express solutions that give any designer, even those without prior PCI Express experience, the power to transition easily and quickly," explained Arnaud Schleich, co-founder of PLDA. "The adoption cost has never been lower in both financial terms and integration time."
The EZ IP Module is built around PLDA's PCI-SIG compliant PCI Express IP Core. In addition to the three layers required by the protocol (Physical, Data Link, and Transaction), the EZ IP Module introduces a fourth. Based on a familiar PCI Backend interface, the EZ Layer automatically manages the complexities of the PCI Express protocol while serving as the only point of contact with the Application Layer. (PLDA independently offers the full-featured PCI Express IP Core for designers seeking complete control of the PCI Express environment.)
The EZ IP Module is designed for Endpoint components and supports x1 and x4 Lane Configurations. It also supports Intel's PIPE specifications, is interoperable with the main PHY IPs, and includes built-in DMA channels.
Pricing and Availability
The EZ IP Module is sold as part of the full-license PCI Express IP Core (ASIC and FPGA) and in a limited-license version as part of a board package. PLDA boards that integrate the module start as low as $795, and include the PCI Express Design Kit (Altera Stratix GX40 & Xilinx Spartan III versions), the PCI Express XpressBridge (Altera Stratix GX), and the PCI Express XpressFX (Xilinx Virtex-4 FX).
About PLD Applications
PLDA, the World's largest PCI IP Module vendor (Gartner, 2005), designs and sells a wide range of ASIC and FPGA interfacing solutions for the PCI and derivative markets (PCI Express, PCI-X, CompactPCI, and PC104/PC104+). The company offers complete solutions to a global market, including IP cores, hardware, software, consulting services, and comprehensive technical support provided directly by the IP designers. For additional information about PLD Applications, please visit http://www.plda.com.
The EZ IP Module is targeted to PCI designers making the shift to PCI Express and to experienced PCI Express designers looking for a robust yet simple PCI Express interface.
"PLDA is launching a suite of PCI Express solutions that give any designer, even those without prior PCI Express experience, the power to transition easily and quickly," explained Arnaud Schleich, co-founder of PLDA. "The adoption cost has never been lower in both financial terms and integration time."
The EZ IP Module is built around PLDA's PCI-SIG compliant PCI Express IP Core. In addition to the three layers required by the protocol (Physical, Data Link, and Transaction), the EZ IP Module introduces a fourth. Based on a familiar PCI Backend interface, the EZ Layer automatically manages the complexities of the PCI Express protocol while serving as the only point of contact with the Application Layer. (PLDA independently offers the full-featured PCI Express IP Core for designers seeking complete control of the PCI Express environment.)
The EZ IP Module is designed for Endpoint components and supports x1 and x4 Lane Configurations. It also supports Intel's PIPE specifications, is interoperable with the main PHY IPs, and includes built-in DMA channels.
Pricing and Availability
The EZ IP Module is sold as part of the full-license PCI Express IP Core (ASIC and FPGA) and in a limited-license version as part of a board package. PLDA boards that integrate the module start as low as $795, and include the PCI Express Design Kit (Altera Stratix GX40 & Xilinx Spartan III versions), the PCI Express XpressBridge (Altera Stratix GX), and the PCI Express XpressFX (Xilinx Virtex-4 FX).
About PLD Applications
PLDA, the World's largest PCI IP Module vendor (Gartner, 2005), designs and sells a wide range of ASIC and FPGA interfacing solutions for the PCI and derivative markets (PCI Express, PCI-X, CompactPCI, and PC104/PC104+). The company offers complete solutions to a global market, including IP cores, hardware, software, consulting services, and comprehensive technical support provided directly by the IP designers. For additional information about PLD Applications, please visit http://www.plda.com.
|
||||||
Related News
- Toshiba Announces Immediate IP Subsystem Availability of PCI Express and DDR3 for Custom LSI Platforms
- Cadence Announces Immediate Availability of Industry's First Verification IP for PCI Express 4.0 Technology
- Northwest Logic Announces the Immediate Availability of x8 PCI Express 2.0 Solution For Xilinx Virtex-5 FXT FPGA Platform
- Northwest Logic Announces the Immediate Availability of x8 PCI Express 2.0 Solution For Xilinx Virtex-5 FXT FPGA Platform
- VinChip Systems Announces Immediate Availability of AHB to PCI Wrapper Module
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
|
E-mail This Article | 
|
|
Printer-Friendly Page |