Sarnoff Introduces Silicon Proven ESD Design Tool Kit For ICs, Matched To Specific Foundry Processes
PRINCETON, NJ, USA/GISTEL, BELGIUM (May 12, 2005) Sarnoff Europe (www.sarnoffeurope.com) today announced the TakeCharge® Design Kit from Sarnoff Corporation (www.sarnoff.com), a new product that gives fabless semiconductor companies proven, ready-to-use solutions to quickly optimize the electrostatic discharge (ESD) and high-performance I/O designs of their ICs for specific foundry processes or applications.
The Design Kit, introduced at FSA Expo Europe (Booth 5), is available for such standard processes as TSMC 0.18 and 0.13 for both standard and epitaxial wafers. It can be readily adapted to other standard or proprietary processes. TakeCharge Design Kits are already being delivered for 90nm and 65nm customer proprietary processes.
Based on Sarnoff's broad ESD technology portfolio, the Design Kit gives users the same "first-time-right" design approach with I/O area reduction and high-performance interface capability as the full TakeCharge Technology Transfer package, but without involving them in developing in-house ESD capabilities.
"If an IC development team is looking for a reliable tool to integrate robust, process-compatible ESD performance into their designs without compromising their high performance, our TakeCharge Design Kit is the perfect solution," said Koen Verhaege, Senior Director of Sarnoff's Integrated Circuit Systems & Services Business Unit and Executive Director of Sarnoff Europe. "The Design Kit provides silicon-proven, professionally documented solutions and integration tools that engineers can implement to achieve first-time-right I/Os and product ICs.
"To help assure success we include application training and up to 400 hours of engineering support, plus two implementation design reviews, as part of the license."
Lets Users Optimize Solution To Each IC Design
The standard Design Kit includes a full ESD solution set for all applications and stress cases, with a GDSII reference cell for each solution.
Also included are
- An integrated calculation tool
- Comprehensive application notes
- A general design and layout strategy reference
A Design Kit for a process not included in the standard offering adds a customization kick-off meeting with Sarnoff experts at the user site to solidify the scope and parameters of the project. The licensee also receives a customized TEG design and tape-out (in GDSII) and silicon verified ESD design rules integrated into the customized TakeCharge Design Kit. With the customization complete, the licensee can then use the Design Kit to develop new ICs in the normal way.
The Design Kit is part of a growing family of products based on the TakeCharge on-chip electrostatic discharge (ESD) design IP portfolio. TakeCharge® has been silicon proven in advanced processes down to 65nm CMOS including SOI. Licensees include Toshiba, Sony, Epson, OKI, JRC, Hynix, Infineon, Altera, PMC-Sierra, Renesas, Ricoh, Matsushita, and Scintera.
About Sarnoff
Sarnoff Corporation (www.sarnoff.com) produces innovations in electronic, biomedical and information technology that generate successful new products and services for clients worldwide. Founded in 1942 as RCA Laboratories, it develops breakthroughs in ICs, lasers, and imagers; drug discovery, manufacture and delivery; digital TV and video for security, surveillance, and entertainment; high-performance networking; and wireless communications. Its history includes the development of color TV, the liquid-crystal display, and the disposable hearing aid, and a leadership role in creating the new U.S. digital and HDTV standard. Sarnoff also founds new companies to bring its technologies to market. It is a subsidiary of SRI International.
About Sarnoff Europe
Sarnoff Europe (www.sarnoffeurope.com) headquartered in Gistel, Belgium, is a subsidiary company of Sarnoff Corporation. Sarnoff Europe assumes worldwide responsibility for the commercialization of Sarnoff's Integrated Circuit Systems and Services portfolio offerings, including the ESD protection families TakeCharge® and ESDdoctorTM, the SelectCoresTM families for Audio, Video, and Communications, and the Sarnoff Bitstreams for video standards compliance testing.
|
Related News
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- True Circuits Introduces New Synthesizable Precision PLL and Synthesizable Micro PLLs and DLLs and Demonstrates Silicon Proven DDR PHY
- OPENEDGES and The Six Semi Announce Silicon Proven LPDDR5/4/4x PHY in Samsung Foundry 14LPP Technology Operating at 6400Mbps
- Sofics Analog I/O's and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes
- Sarnoff Europe Becomes Sofics, Announces New System-Level ESD Solutions for High-Voltage ICs
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |