Small, robust flash cell claims easy process integration

At the outset, the designer has to choose between density and process complexity. At one extreme, Virage Logic Corp. offers its Novea embedded nonvolatile memory cell, which through clever use of a lot of area adds no masks to a standard logic process. The density may only be suitable for parameter storage, calibration information and the like, but Novea doesn't require any process changes.

At the other extreme, foundries like Taiwan Semiconductor Manufacturing Co. Ltd. offer flash process modules. These typically offer quite good density, suitable for moderate-sized code or data storage applications. But the process is significantly more complex than the standard logic process, and hence issues of cost and yield come up. Also, the flash module tends to get added rather late in a process' life cycle, so it's not an option for leading-edge designs.

Now a very quiet startup called Memtek LLC is offering a middle road between those extremes. Based on intellectual property left in trust by noted nonvolatile-memory designer John Caywood and licensed exclusively to Memtek, a new cell developed by the company offers an unprecedented degree of robustness, easy process integration and a size nearly as small as the STMicroelectronics-derived TSMC cell.

Caywood's approach was to define a simple cell, not dependent on intricate process steps and so conservatively designed that it could function in demanding environments, according to Memtek general partner Mammen Thomas. The result, now that Memtek is starting to see silicon, is remarkable.

The cell is exhibiting 125-year data retention, Thomas said, and endurance in excess of a million cycles. This compares with the 20k or so cycles at which embedded-flash devices are typically specified. The design is sufficiently robust that on the 0.35-micron process in which chips are currently being fabricated, Memtek is seeing yields in excess of 95 percent.

Another important characteristic of the design is that E2PROM arrays can operate at — not just tolerate, but operate at — a - 40° to 125°C temperature range. Read operation is possible over a range from 1.6 to 3.6 volts. Erase and write could be done over that range as well, but the lower voltages would require rather outsize charge pumps, so erase and write operations are specified over a narrower voltage range.

The cell is also inherently low in power. The time average of page write current is 150 microamps and read current is 200 nA. This latter number is also an average, as the array is designed to be somewhat self-timed, with the sense amps shutting down at the completion of a cycle. Speed is not atypical for E2PROM — 90 nanoseconds worst case at 2.7 V and 170 ns at 1.8 V.

Cell area is somewhat larger than the densest embedded E2PROM solutions — about 4 microns2 in the present 0.35-micron process and an estimated 1.3 microns2 in a 180-nanometer process. The density may be better estimated by talking about whole array size, however. This is particularly important because, if the objective is an embeddable EPROM array, the designer is unlikely to be using a high-voltage analog process module to optimize the charge pumps and sense amps — these will have to be fabricated in the underlying logic process. If this is not done very cleverly, they will add significantly to the size of the array.

Demo arrays
Memtek has specified four demonstration arrays so far. The simplest of these is a 4k x 16 E2PROM, which includes internal control, write timing and charge pump circuitry and has a simple SRAM-type interface. The array occupies 1.22 x 0.98 mm. The other versions, all of similar size, include a synchronous-block 4k x 16; a power-optimized 4k x 16 that has full read, program and erase operation at 1.8 V; and a stripped-down flashlike array that relies on external voltages and timing signals, but reduces the area to 1.15 x 0.85 mm.

Memtek has already transferred the technology to a number of integrated device manufacturers, none of which the company can identify publicly. It is now working with AMI Semiconductor Inc. and says it has brought the technology up with only four to five additional mask steps and no nonstandard processing.

The company says it stands ready to work with IDMs, foundries or customer-owned-tooling design teams. It can provide licenses to the technology, process integration and optimization support, design services or training on memory design, so that the customer can develop its own arrays, product test and life cycle support.

"Before John Caywood died he put the technology in trust and he asked us to take it and run with it," Thomas said. "I think there are lots of places where John's design can be a big help to others."