Aptix teams up with MIPS Technologies on the IP test drive program
APTIX TEAMS UP WITH MIPS TECHNOLOGIES ON THE IP TEST DRIVE PROGRAM
Aptix to host remote evaluation of MIPS cores
San Jose, CA - December 4, 2000 - Today,Aptix Corporation announced a partnership with MIPS Technologies to make MIPS processor cores available as part of the Aptix eSoCverify IP evaluation program. Through the eSoCverify IP Test Drive™ program, users will be able to browse a secure repository containing the MIPS cores and remotely evaluate them on the Aptix high-performance modeling platform. Authorized users can download emulation-ready models of the cores or have custom platforms integrated remotely through the eSoCverify program.
The partnership includes the MIPS32 4Kc™, 4Km™, and 4Kp™ cores. The 4Kc core includes a single-cycle multiplier and a MMU. Emulation- ready models of these cores will be available in the secure repository of eSoCverify IP Test Drive. The models are accessible from the Aptix website (www.esocverify.com). Using a standard browser, users can access information about the cores, including emulation characteristics (including throughput and resources required). Through the browser, users can then run MIPS-supplied evaluation suites on a high- performance Aptix hardware modeling platform. Users will be able to remotely modify the evaluation suites or upload their own test vectors to evaluate the cores.
"MIPS is a leader in the embedded revolution that is happening around us, and their star IP is a cornerstone of the technology platforms our customers are developing" said Leif Rosqvist, COO at Aptix. "The IP Test Drive and eSoCverify programs provide frictionless evaluation and efficient integration for users. Our technology provides the security and control MIPS requires to protect its intellectual property," he added.
The cores will have the "Verified by Aptix" designation, which certifies that the emulation-ready models are functionally equivalent to the MIPS supplied models. It also certifies the stated emulation throughput and emulation resource requirements. Users requiring further access to the models can have it by way of a two part electronic license--one part from MIPS and one part from Aptix. When authorized, users can download the models or remotely schedule custom integrations through the Aptix eSoCverify program. A unique attribute of the Aptix open architecture is that IP models and custom modules can be integrated as interconnected blocks. This enables efficient integration, preservation of design hierarchy, and absolute predictability of emulation throughput and emulation resource requirements.
"The MIPS32 4K™ family of cores has achieved widespread acceptance by silicon vendors targeting consumer and communications applications," said Ed Forbes, Director of Third Party Relations at MIPS. "The Aptix platform addresses the needs of our growing licensee base by scaling all the way from co-simulation to in-circuit emulation, while offering all the flexibility users require to verify MIPS cores in the target application environment. The accessibility, usability and security of the eSoCverify and IP Test Drive program allows MIPS to bring its technology to the market in a new way and guarantees the level of security and control that our business model requires" added Mr. Forbes.
IP Test Drive is a product from Aptix that allows secure web-enabled access to high-performance emulation. IP Test Drive also has an integrated repository and configuration management capability. The IP Test Drive product is targeted at organizations that need to share or distribute IP internally or externally and also need to provide shared access to high-performance modeling capability. Under the eSoCverify program, IP Test Drive is hosted by Aptix to provide access to emulation ready models of leading IP products and sample technology platforms.
About Aptix Corporation
Aptix Corporation?s products are used to verify system and system-on-chip (SOC) designs prior to integrated circuit (IC) and board tape-out and fabrication. Aptix?s products utilize the block-based verification methodology, which provides a mechanism to map and verify individual design blocks incrementally and in parallel with the design creation process. This methodology shortens the net prototype creation time of achieving real-world operation of the prototype to the few days required to map and verify the last RTL block designed. Debugging designs becomes simple because the mapping process is both under the user?s interactive control and follows the natural hierarchy of the design. This also makes tracing design problems back to the source netlist an intuitive process.
The company is privately held and is headquartered at 2880 North First Street, San Jose, California 95134. Telephone (408) 428-6200, Fax (408) 944-0646. Visit Aptix on the Web at http://www.aptix.com.
###
Aptix is a registered trademark of Aptix Corporation. IP Test Drive is a trademark of Aptix Corporation.
For More Information Contact:
Leif Rosqvist (Aptix)
(408) 428-6200
leifr@aptix.com
Related News
- Aptix system lets users test-drive IP over the Net
- New MIPS CEO Sameer Wasson to Drive Company's RISC-V Market Penetration and Innovation
- Agile Analog joins Intel Foundry Services Accelerator IP Alliance Program to drive forward semiconductor design innovation
- Synopsys Approves Stock Repurchase Program with Authorization Up to $1.5 Billion
- VESA Launches Industry's First Open Standard and Logo Program for PC Monitor and Laptop Display Variable Refresh Rate Performance for Gaming and Media Playback
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |