New Low Power ASIC Offering Delivers as Much as 30X Improvement in Standby Power Management ANAHEIM, CA -- Jun 13, 2005 -- IBM today announced two new 65 nanometer (a nanometer is a billionth of a meter) application-specific integrated circuit (ASIC) product offerings, including the company's first ever comprehensive low power ASIC offering for the fast growing wireless, mobile and consumer electronics market. An ASIC is an integrated circuit customized for a particular use, rather than intended for general-purpose use. For example, a chip designed solely to run a cell phone is an ASIC.
Specifics of this dual offering were detailed today at the 2005 Design Automation Conference (DAC) in Los Angeles, CA:
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IBM's low power ASIC offering (Cu-65LP) -- designed to provide IBM's ASIC technology to highly integrated, power sensitive applications found in today's wireless, mobile and consumer devices. With leakage currents reduced by as much as 30X from the previous 90nm ASIC offering, IBM's industry leading design methodology and system on chip expertise can now be applied to ever more sophisticated functions found in battery powered and thermally challenged environments.
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IBM's new high performance 65nm ASIC offering (Cu-65HP) targets high-frequency, performance-driven applications required by Networking, Communications, Data Processing and Storage Network markets. This 65nm ASIC offering increases performance as much as 20 percent over the previous 90nm ASIC offering. Both 65 nanometer (nm) ASIC offerings have the ability to pack nearly twice as many circuits on a die compared with the equivalent 90nm offering.
"This dual offering will continue our undisputed logic ASIC technology leadership at the high end," said Tom Reeves, OEM vice president, Semiconductor Products for IBM Systems & Technology Group. "Now with the introduction of our low-power ASIC offering we will bring our proven record of technology leadership to the high growth consumer marketplace."
Innovations found in both Cu-65LP and Cu-65HP offerings include:
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Statistical techniques in timing and optimization to address process variation. These techniques enable designers to correct errors that might previously have gone undetected on a real-time basis, and re-engineer the chip throughout the design flow. The result is a more robust design optimized for performance and power targets.
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Strained silicon: IBM developed a method to introduce "strain" into the crystal structure forming the transistors, producing more useful current. Strained silicon improves useful current by as much as 40% over devices lacking strain.
The low power (Cu-65LP) design kit targeted availability is in the second quarter of 2005, followed by the high performance design kit planned for later in the year. Volume production for the Cu-65 low power and high performance offerings are planned in the first quarter and third quarter of 2007, respectively.
The offering includes standard-cell logic design libraries; multiple I/O families; embedded SRAM and DRAM; a diverse collection of cores, including industry leading high-speed SerDes and embedded microprocessors highlighting PowerPC Architecture, as well as a wide range of packaging solutions.
The IBM low power ASIC offering is built on top of industry standard ARM Artisan physical IP, specifically standard cells, SRAM memory compilers and general purpose I/Os. IBM's ASIC methodology is intended to enable fast design closure and help achieve first pass success designs. ARM, a provider of industry standard libraries, is co-developing these 65nm low power libraries with IBM.
About IBM
IBM develops, manufactures and markets state-of-the-art semiconductor and interconnect technologies, products and services including industry-leading Power Architecture microprocessors. IBM semiconductors are a major contributor to the company's position as the world's largest information technology company. Its chip products and solutions power IBM eServer and TotalStorage systems as well as many of the world's best-known electronics brands.
IBM semiconductor innovations include dual-core microprocessors, copper wiring, silicon-on-insulator and silicon germanium transistors, strained silicon, and eFUSE, a technology that enables computer chips to automatically respond to changing conditions.
More information is available at: http://www.ibm.com/chips.
