Rambus Signs New Technology License Agreement With IBM; Agreement Allows Access to XDR Memory Controller Interface Cell for ASIC Customers
Rambus's high-speed XIO cell combined with IBM's IP and advanced process technology capabilities will allow IBM to assist its customers in bringing high performing designs to the market.
"Rambus has a long history of designing and delivering very high speed, advanced interface designs that have been broadly used in the industry," said Tom Reeves, vice president of IBM's Semiconductor Products and Solutions. "We have worked with them on several projects and are pleased to build upon our existing relationship with this new agreement."
The Rambus XIO cell is a high-performance, low-latency controller interface to XDR DRAM memory sub-systems. It is a versatile CMOS macro cell that can be seamlessly integrated into a wide variety of target processes. The general purpose cell is independent of the logical memory controller design, enabling support for a wide variety of memory applications needing high bandwidth and low latency. The XIO provides a wide, on-chip, CMOS-level signaling interface to the memory controller logic and a narrow, high-speed Differential Rambus Signaling Level (DRSL) interface to the external XDR memory system.
"IBM maintains a strong leadership position in processors and process technology and we are happy to extend our working relationship with them to help bring the most advanced products to the market," said Laura Stark, vice president of Platform Solutions at Rambus. "The industry continues to face challenging interface issues as designs increase in speed and users demand more and more functionality. Our engineers are focused on designing and developing the most advanced interface designs that help our customers meet the ever-increasing demands of their customer base."
For additional information on all the Rambus interface products, please go to www.rambus.com/products.
About Rambus Inc.
Rambus is one of the world's premier technology licensing companies specializing in the invention and design of high-speed chip interfaces. Since its founding in 1990, the company's innovations, breakthrough technologies and integration expertise have helped industry-leading chip and system companies solve their most challenging and complex I/O problems and bring their products to market. Rambus's interface solutions can be found in numerous computing, consumer, and communications products and applications. Rambus is headquartered in Los Altos, Calif., with regional offices in Chapel Hill, North Carolina; Bangalore, India; Taipei, Taiwan; and Tokyo, Japan. Additional information is available at www.rambus.com.
|
Related News
- Rambus Renews License With IBM
- WiLAN Subsidiary Polaris Signs License Agreement with Marvell
- IBM and Rambus sign Technology License Agreement for Cell Broadband Engine-Based Processors and Companion Chips
- Rambus and Denali Sign License Agreement; Denali Integrates Rambus' Memory Controller IP into Databahn
- Rambus Signs License Agreement for Its DPA Countermeasures to Beijing Tongfang Microelectronics Co., Ltd.
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |