MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
ViASIC Announces 12th Tape-out for ViaMask Standard-Metal Library
Durham, NC - June 27, 2005 - ViASIC Inc. today announced the successful tape-out of the first dozen chips using the ViaMask standard-metal libraries. Standard-metal uses pre-designed logic along with pre-designed routing. A design’s RTL is configured using a single via layer. The ViaMask standard-metal fabric offers excellent densities and routability while yielding standard-cell-like clock speeds and power consumption.
Because the ViaMask logic, memory, and routing are pre-characterized, design closure of timing, signal integrity, and power is much simpler than standard cell. By using ViaMask, mask costs can be up to 30x less, schedule costs are significantly lower, and design respins do not pose a problem. ViaMask customers can get their products to market quickly by creating an initial version before final specs are set. ViaMask customers can add or change a part's features, to target different markets or quickly add customer-specific features.
About ViaMASK
ViaMASK is a single via layer configuration solution, which can reduce NRE charges and fabrication cost by more than 90% compared to standard-cell design. This patented fabric provides easy design closure while providing a dense, high-performance fabric of interwoven configurable RAM and logic. The ViaMask standard-metal libraries have been used to build configurable SOCs as well as structured ASICs.
About ViASIC Inc.
ViASIC is a privately held EDA company and the leading provider of standard-metal tools and technologies. The company’s patented ViaMask fabric is a complete library for building platform ASICs or embedding single via layer configurable sections into an SoC. ViASIC also offers ViaPath, a robust physical design solution for via-configurable fabrics. ViASIC is located at 2635 Meridian Parkway, Durham, NC 27713. Telephone 919-767-6941, Fax 919-767-6933
www.viasic.com
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