Virage enhances Embed-It memory design platform

Virage enhances Embed-It memory design platform
By Michael Santarini,
January 7, 2002 (12:36 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020107S0040

SAN MATEO, Calif. — Memory library vendor Virage Logic Corp. has enhanced its Embed-It memory design platform with new user-productivity and ease-of-use features.

Vin Ratford, vice president of marketing and business development at Virage, said Embed-It version 3.0 has improved Architect and Integrator tools and a new automated characterization tool.

"The number of compilers required for different processes is exploding," Ratford said. "Customers have been telling us that they need to do more memory characterization, so our software development team has invested a lot of time in automating the characterization process for not only the people that develop the memories but also the people that have to instantiate them into system-on-chip designs."

Ken Rousseau, vice president of software development, said Virage has improved the Layout Assembler feature in the Virage Architect tool, which designers use to produce embedded-memory compil ers, such as register files, SRAMs, DRAMs, ROMs, EPROMs, flash and content-addressable memories. Previously, Rousseau said, Embed-It users had to develop compilers by writing code for Cadence's Virtuoso layout system. With Virage's Layout Assembler, users can view, create and do what-if inquiries in a graphics-based environment. The tool automatically generates Virtuoso code.

"Users don't have to leave the Cadence environment to automate leaf cell development," said Rousseau. "The GUI gives users access to all the things they would want to do, such as change the vectors, simulation corners and device models."

In the 3.0 release, the company has also made Integrator software accessible via the Web. Rousseau said the tool lets system-on-chip designers use a Web browser to access memory compilers and rapidly generate individual memory instances that are to be integrated into their chips. Doing so, he said, gives designers access, through a secure central server, to memory compilers available from Virag e and from proprietary compiler databases.

"Central CAD teams or memory development teams may create the compilers, but they want to be able to deploy this to many remote design sites," Rousseau said. "Historically, users install Integrator on their machine and install databases for compilers and then generate memory instances to your heart's content. But getting it installed required some software expertise. Now we have made it simple and given it a Web-based interface."

Also, new software called Automated Characterization gives users a quick and accurate measurement of a memory's performance, including I/O, transistor, resistance, capacitance, power consumption and so on. The feature eliminates the common practice of writing characterization scripts and shaves 30 days at the end of a six-month design cycle, Virage said.

For a one-year license, Architect starts at $160,000, Integrator online is priced at $500,000 and the Automated Characterization tool starts at $100,000.