Aplus to Provide Low-Power, Low Voltage (1.8V) Operation EEPROM Macro Solution at UMC
Update: Aplus Flash Technology is no more in business
SAN JOSE, Calif.--Aug. 29, 2005--Aplus Flash Technology, a privately-held, fabless provider of nonvolatile memory (NVM) products and customized NVM IP, today announced that it has signed an agreement whereby it will develop EEPROM Semiconductor Intellectual Property (IP) for UMC's 0.35um EEPROM process technology. This effort will provide UMC's foundry customers with access to Aplus' high-performance EEPROM IP and comprehensive support services when designing their IC and System-On-Chip (SoC) products.
The Aplus EEPROM memory macro is being built to target applications requiring non-volatile memory storage for program or data, offering flexible page write or in-system byte write/erase functionality with high program/erase cycles. It is designed to operate over a temperature range of -35 degrees C to 85 degrees C. The macro block is also designed to be customized in order to meet various customer requirements for low-power, low-voltage, and high-performance capabilities. This is intended to allow customers the flexibility to utilize the memory to target different specifications for applications such as smart card, SIM card, RFID, security ICs, ID, and other products that require data storage to a byte erasable/programmable level.Ken Liou, Director of the IP and Design Support division at UMC, said, "Non-volatile memory plays an important role in a variety of semiconductor industry applications. As such, we are pleased to have Aplus, a valuable IP provider of non-volatile memory solutions, port its non-volatile EEPROM IP to our process technology. We look forward to making their IP solutions available to our customers designing for applications that benefit from EEPROM technology."
"Aplus' commitment is to provide foundry flexibility for our NVM IP customers. Our agreement with UMC will make Aplus' leading EEPROM IP more widely available to customers targeting UMC's process technologies," said Peter Lee, CEO of Aplus. "As SoCs grow increasingly complex and the need for non-volatile memory increases, the IP offerings from Aplus ported to UMC's process technology should provide great value in accelerating our customers' time-to-market and reducing their design cycle and risk while enhancing their products' functionality and performance."
The EEPROM Semiconductor IP is targeted to be available in Q4 of 2005.
About Aplus Flash Technology (www.aplusflash.com):
Aplus Flash Technology is a fabless IC company offering non-volatile memory IP and memory products. Its line of NVM IP includes ROM, OTP, NTP, EEPROM, FLASH+EEPROM and FLASH, and can be embedded into a variety of communications, computing and consumer applications. Aplus offers both standard IP blocks as well as customized ASIC designs. In addition to its IP Aplus also develops standard memory products. Its IP blocks can be found in applications from smart cards to talking toys to microcontrollers and other IC drivers. Aplus' embedded licensees including leading global semiconductor companies and its foundry connections span worldwide in countries including Taiwan, Korea and China.
Source: Aplus Flash Technology
|
Related News
- Chipidea's New USB PHY Architecture for 1.8V Devices Offers Industry's Lowest Power Consumption for SoC Designers
- MOSCAD Design & Automation Releases Ultra low-power Voltage regulator cell in 55nm
- Shenzhen Integrated Circuit Design Industrial Center Licenses Low-Power Cores from MIPS Technologies
- Actel Expands Processor Ecosystem for Low-Power FPGAs
- ARM, Renesas Technology and Synopsys Define Industry's First Low-Power Verification Methodology
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |