Virtual Silicon Expands Mobilize Product Line For Industry's First Complete 90NM Power Management IP Platform

Targeting Leading 90nm Foundries, the Complete Mobilize Power Management line Now Includes Standard Cells, SRAM Compilers, PLL and Programmable Basic I/O

Sunnyvale, CA USA - August 29, 2005 -- Virtual Silicon Technology, Inc., today announced a dramatic expansion of the award-winning Mobilize™ line of 90nm semiconductor IP. Mobilize now includes a complete standard cell library with power-island manager; high-performance, low-power single-port, dual-port and two-port SRAM compilers; and a highly flexible, programmable basic I/O. Along with the previously announced Digital Frequency Synthesizer PLL, the full line is available to major foundries supplying 90nm, 65nm and smaller geometries.

Mobilize components employ Virtual Silicon's Gate Bias power-management technology to reduce SoC static leakage by over 100x in portable electronic products, such as digital cameras, MP3 players and mobile phones. Based on silicon testing, Gate Bias is the best method to dramatically reduce leakage in 90nm generic CMOS and the benefits provided by Gate Bias increase significantly over other methods as the geometries shrink to 65nm and below. Initial customers are actively designing SoCs with the complete 90nm Mobilize line and are expecting to tapeout in late 2005.

The Virtual Silicon Standard Cell Library includes 352 standard cells and implements Virtual Silicon’s Gate Bias Technology for a greater than 100X leakage improvement with no performance impact and minimum area impact of less than 3%. The library features ultra low-power flip flops with data retention, requiring 25% less dynamic power; 3-corner characterization models; and Virtual Silicon’s unique architecture, optimized for synthesis with no performance penalty.

The Virtual Silicon Single-port, Dual-port and Two-port SRAM Compilers are high-density, high-performance memory solutions for embedded applications. They feature industry-leading performance with lowest leakage (>400 MHz for a 256kbit array), synchronous read/write operations, the ability to compile to multiple aspect ratios, a “write per bit” operation and an easy interface to industry-standard BIST controllers. Virtual Silicon’s memories use Gate Bias technology to reduce stand-by leakage by 50x in a standard generic CMOS process.

The Virtual Silicon Programmable Basic I/O operates at up to 200 MHz and delivers over 800 functional combinations of logic, drive strength and slew rate to support a variety of SoC applications. It features a voltage range of 1.62 to 3.63V, ultra low leakage and LVTTL/LVCMOS compatibility. The programmable basic I/O includes general-purpose input and output (GPIO) padcells, I/O ring components and power supply padcells, optimized for use with multiple power supply domains in low-power, high-performance applications.

About Mobilize™

The Mobilize platform provides a unique, high performance solution for managing active and static power. Because Mobilize IP is designed to a standard generic CMOS process with no triple well or multi-Vt required, it can easily integrate with third-party IP. Mobilize-based SoCs can be produced with the smaller area, lower cost and higher performance provided by the generic process, and with Gate Bias has low leakage comparable to a more expensive, larger area low-power process. Fully integrated with leading EDA tools and design flows, the Mobilize platform allows designers to dynamically optimize power and performance using standard tools. The complete Mobilize line includes a Standard Cell library, Delta-sigma Fractional-N PLL, SRAM Compilers and Programmable Basic I/O. The 90nm Mobilize line is tapeout ready for a leading foundry today, and will be available for other foundries serving power managed or low power SoC applications in the future.

Product Availability

The Mobilize 90nm standard cell, programmable basic I/O, and PLL products are available today. The single-port SRAM compiler will be available in Q3’05. The dual-port and two-port SRAM compliers will be available in Q4’05. For more information, please access the Virtual Silicon Customer Center online at (http://www.virtual-silicon.com/customer_center.cfm).

About Virtual Silicon Technology

Virtual Silicon is a leading supplier of semiconductor intellectual property and process technology to manufacturers and designers of complex systems-on-chip (SoC). Headquartered in Sunnyvale, CA, the company provides process-specific embedded components that serve the wireless, networking, graphics, communication and computing markets. Customers include leading fabless semiconductor companies, integrated semiconductor manufacturers, foundries, and SoC developers who demand leading edge technology for their semiconductor innovations. For more information, visit Virtual Silicon online at www.virtual-silicon.com.

Your Source for IP®, Silicon Ready,™ Moblize™, The Heart of Great Silicon® and Virtual Silicon are trademarks of Virtual Silicon Technology, Inc.