Aeonic Generate Digital PLL for multi-instance, core logic clocking
Intrinsix Expands Sigma-Delta Data Converter IP Offerings
The Intrinsix Sigma-Delta architecture is designed to leverage standard CMOS technologies (90-250nm) from vendors such as TSMC, UMC, SMIC and others. Various resolutions are available (up to 24-bits) and Sigma-Delta Modulation (SDM) complexity ranges from 3rd to 6th order. These small, multi-channel cores achieve very aggressive Signal-to-Noise Ratios (SNRs) and are designed to be tunable based on the design requirement. Intrinsix utilizes its custom designed Sigma-Delta Refinery (ΣΔ Refinery™) to automate the development of highly efficient SDMs.
About Sigma-Delta Data Converter Technology
Use of a Sigma-Delta Modulation (aka ΣΔ Modulation, SDM or Delta-Sigma Modulation) scheme in the design of Digital-to-Analog Converters (DACs) and Analog-to-Digital Converters (ADCs) allows for very efficient, high performance data converters. To learn more about SDM, SDM-based data converters and the ΣΔ Refinery, please visit the Intrinsix website at: http://www.intrinsix.com/intrinsix-ip/sigma-delta/
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