NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
Sequence Design and Virtual IP Group ally to deliver Design-closure services
SEQUENCE DESIGN AND VIRTUAL IP GROUP ALLY TO DELIVER DESIGN-CLOSURE SERVICES
Strategic partnership targets sub-180-nanometer System-on-Chip design; companies introduce innovative business model
SANTA CLARA, CALIF. - October 16, 2000 -- Sequence Design Inc., the premier provider of power and timing closure solutions for system-on-chip design, today announced it has formed a strategic alliance with Virtual IP Group to deliver physical design-closure services for customers designing ICs with features sizes below 180 nanometers.
As part of the program, Virtual IP Group, a design foundry providing intellectual property and design-services, will deploy Sequence's interconnect-driven design-closure products in its design methodology. Sequence products involved include timing optimization, power analysis and optimization, and 3D interconnect-modeling tools.
In addition, Sequence will leverage Virtual IP's design centers and consulting resources to help test future Sequence tools and methodologies on advanced communications, multimedia and other system-on-chip designs.
This alliance represents a departure from the traditional "perpetual license" EDA business model. Under the terms of the alliance, Sequence will earn revenues on a per tape-out basis, as Virtual IP Group delivers completed chip designs to its own end customers.
"Virtual IP's combination of advanced design know-how, intellectual property suite, and blue-chip customer list has made them extremely successful in the competitive design-services market. They're an ideal partner," said Vic Kulkarni, chief operating officer of Sequence. "This business agreement is a key step forward for Sequence in two significant areas. First, it expands our market to include customers we might not otherwise reach, and without any issues of competing with our own EDA customers. And second, it gives Sequence a recurring revenue model tied directly to the value we deliver."
"This kind of win-win alliance between design-services and EDA companies is a good model for the industry," said Joseph Hong, chief operating officer of Virtual IP Group. "We can better deploy state-of-the-art EDA technology as it's developed, at business terms that relate to end value derived; yet we're not locked into a single source for design tools. The ultimate beneficiary will be our customers."
About Virtual IP Group
Virtual IP Group was established in 1994. It is a "design foundry" providing intellectual property (IP) development, licensing and integration services as well as front end and back end design services. The company offers a comprehensive library of silicon-proven, synthesizable IP cores for implementation in FPGA, ASIC and COT design platforms. In March 2000, ZiLOG Inc. purchased a 20-percent equity stake in Virtual IP Group and QualCore Logic Ltd., an affiliate of Virtual IP Group located in Hyderabad, India.
About Sequence
Sequence Design Inc. is the premier provider of timing and power optimization for design closure in system-on-chip integrated circuits. Sequence's chip design software and services enable engineering teams to develop superior products quickly, in order to achieve competitive advantage in high-growth technology markets. Customers include Broadcom, Ericsson, Fujitsu, LSI Logic, NEC, Nokia, Nortel Networks, MMC Networks, Sony, Sun Microsystems, Texas Instruments, Toshiba and Vitesse Semiconductor.
Sequence supports worldwide development and field service operations. The company was formed through the merger of Sente, Inc and Frequency Technology. Sequence is privately held; investors include IVP, Menlo Ventures, Alpine Technology Ventures, Atlas Ventures, Intel, Sumitomo Corporation, LSI Logic, Sofinnova, Skywood Ventures and Sigma Partners.
Sequence is a member of Cadence Design Systems' (NYSE: CDN) Connections[tm] and Mentor Graphics' (NASDAQ: MENT) Open Door[tm] partnership programs. Please visit our web site at www.sequencedesign.com.
###
All trademarks mentioned herein are the property of their respective owners.
FOR MORE INFORMATION:
Vic Kulkarni, Sequence Design Inc.
(408) 961-2314, vkulkarni@sequencedesign.com
Ann Steffora, VitalCom Marketing & Public Relations
(650) 637-8212, x207, ann@vitalcompr.com
Joseph Hong, Virtual IP Group, Inc.
(408) 733-3344, jhong@virtualipgroup.com
Related News
- EMA Design Automation to Spin-Off IP & Services Group to Enable Digital Transformation for the Entire CAD Industry
- Cadence Collaborates with GlobalFoundries to Deliver Complete Digital Solution on Amazon Web Services
- Achronix and Mobiveil Announce Partnership to Deliver High-Speed Controller IP and FPGA Engineering Services
- Synopsys and Samsung Foundry Collaborate to Deliver Fastest Design Closure and Signoff for Process Nodes Down to 3nm
- Cadence Collaborates with Amazon Web Services to Deliver Electronic Systems and Semiconductor Design for the Cloud
Breaking News
- Micon Global and Silvaco Announce New Partnership
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
Most Popular
E-mail This Article | Printer-Friendly Page |