Samsung Electronics Develops World's First 512-Megabit DDR2 with 70nm Process Technology

SEOUL, South Korea--Oct. 13, 2005--Samsung Electronics Co., Ltd., the world leader in advanced memory technology, announced that it has completed development of the world-first 512-Megabit (Mb) DDR2 SDRAM using 70-nanometer processing, the smallest process technology yet applied to a DRAM device.

The new 70nm technology maintains continuity with the 80nm and 90nm processes Samsung now uses in most DRAM production today. However, the number of chips yielded per wafer will be at least 100% higher than could be obtained with 90nm technology.

After completing the first sub-micron DRAM process in 2002, Samsung introduced an 80nm version in 2003 and today has set another industry milestone with the new 70nm version for DRAM fabrication.

Several technological innovations leading to the new 70nm process technology for DRAM, include Samsung's Metal-Insulator-Metal (MIM) capacitor technology, and 3D transistor architecture known as "Sphere-shaped Recess Channel Array Transistor" (S-RACT). These advancements, respectively presented at the VLSI Symposiums of 2004 and 2005, have been applied to overcome the limitations of stacked DRAM cells and vastly improve the data refresh function, critical to the 70nm 512Mb DRAM.

Samsung plans to continue to follow an aggressive time-to-market DRAM implementation for leading nanometer process technologies as it did with its introduction of the 90nm process in mid-2004 and the 80nm in the second half of 2005. The 70nm process technology is scheduled to be used in production beginning in the second half of 2006 for 512M, 1G and 2G densities.

Market research firm, Gartner Dataquest revealed in a May 2005 report that the world DRAM market would be worth US$26.2 billion this year and continue rising to reach US$29.1 billion in 2008. Moreover, next-generation game consoles scheduled for release, most new 3G mobile phones, and Microsoft's new PC operating software program "Vista" are noted as key factors fueling market demand next year. These developments are expected to contribute to continued diversification and growth of the DRAM market worldwide.

Samsung Nano-technology Reference Sheet

• Samsung Electronics Development of Nano-technology for DRAMs

2002	2003	2005
90nm	80nm	70nm

• Samsung Electronics DRAM Device Development

Year	'92	'94	'96	'98	'01	'04
Capacity	64Mb	128Mb	256Mb	512Mb	1Gb	2Gb

• DRAM Market Outlook (millions of US$)



	'04	'05	'06	'07	'08
Overall	26,317	26,169	24,909	21,030	29,108
256Mb	17,375	11,193	4,197	1,042	309
512Mb	4,348	11,488	15,989	10,721	6,087
1Gb	430	1,273	3,436	7,711	16,955
2Gb and higher	--	34	186	1,202	5,667
Other	4,164	2,181	1,101	356	90

Source: Gartner Dataquest, 2Q 2005

• Sphere-shaped Recess Channel Array Transistor (S-RCAT)

Three-dimensional transistors are embedded in DRAM cells, each having one transistor and one capacitor. This new-concept technology minimizes the footprint of the memory device and increases its density.

About Samsung Electronics

Samsung Electronics Co., Ltd. is a global leader in semiconductor, telecommunication, digital media and digital convergence technologies with 2004 parent company sales of US$55.2 billion and net income of US$10.3 billion. Employing approximately 113,600 people in over 90 offices in 48 countries, the company consists of five main business units: Digital Appliance Business, Digital Media Business, LCD Business, Semiconductor Business and Telecommunication Network Business. Recognized as one of the fastest growing brands, Samsung Electronics is a leading producer of digital TVs, memory chips, mobile phones, and TFT-LCDs. For more information, please visit www.samsung.com.