Programmable PCI Express Solution Announced by Lattice Semiconductor, Genesys Logic and Northwest Logic
Companies Collaborate to Provide Low-Cost PCI Express Solution with Full Feature Support
HILLSBORO, OR - OCTOBER 26, 2005 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of an extremely low-cost programmable PCI Express solution that incorporates the LatticeECP™ and LatticeEC™ FPGA devices, the Genesys Logic GL9711 PCI Express PHY, and Northwest Logic's PCI Express IP core. Northwest Logic, the newest member of the Lattice ispLeverCORE™ Connection program, provides its single lane PCI Express IP core tailored to the LatticeEC and LatticeECP device architectures.
PCI Express, the next generation of PCI, uses 1, 2, 4, 8, 16 or 32 serial signals, each operating at 2.5 Gigabits per second, to provide a dramatic throughput improvement over PCI. Additionally, PCI Express software is compatible with PCI, preserving the large investments already made in PCI software.
"PCI Express has become a standard feature in the desktop and server computers shipping today," said Stan Kopec, Lattice vice president of corporate marketing. "The new solution we are announcing today with Genesys Logic and Northwest Logic will enable our customers to rapidly develop and field cost-effective PCI Express solutions," Kopec concluded.
"The combination of our PHY, the Lattice FPGA and the Northwest Logic core provides a compliant PCI Express solution that can be easily and quickly adapted by customers to meet their own unique needs," said Miller Lin, CTO at Genesys Logic. "This collaboration provides customers with a solution for PCI Express applications such as networking, imaging processing, consumer electronics, test equipment and storage. This solution will be a driver of the PCI Express market, and will enable designers to upgrade their device connectivity to multi-Gigabit speed at an affordable cost," Lin concluded.
Pricing and Availability
The LatticeECP-DSP™ FPGA, LatticeEC FPGA, the Genesys Logic GL9711 and the Northwest Logic PCI Express IP core are available now. The overall solution costs less than $13.00 USD for volumes of 250K units and above. In addition, Northwest Logic's PCI Express Development Board with the above components is available now. The base board, which includes a LatticeECP-DSP device, costs $2,995 and the daughter card with the Genesys Logic PHY costs $495.
About LatticeECP-DSP and LatticeEC FPGA Families
The LatticeECP-DSP and LatticeEC FPGA device families are architected to provide the most optimized feature sets combined with the lowest total solution costs of any FPGAs. The LatticeECP-DSP products, targeted for high-performance DSP applications, provide up to a 50% performance and 75% logic utilization improvement over other low-cost solutions when implementing common DSP functions. The LatticeEC FPGA product family, targeted for general-purpose FPGA applications, is a precise and targeted response to the market's explosive demand for low-cost, architecturally streamlined logic solutions.
About the Genesys Logic GL9711 PCI Express PHY
"We are proud that our PCI Express SERDES has been PCI-SIG PCI Express 1.0a physical layer compliant since 2003," said Miller Lin, CTO at Genesys Logic. The GL9711 is a 100% PCI Express 1.0a and PIPE 1.0 compliant PHY. It supports all PCI Express specific features such as De-emphasis, RX Idle Detection, Beacon signal transmission and detection and Spread Spectrum Clocking support. "The GL9711 enables FPGA users to implement PCI Express applications at a low cost, but with 100% feature support," said Lin. The GL9711 supports both 8-bit and 16-bit PIPE interfaces at 250MHz and 125MHz PIPE clock, respectively. It also has an elastic buffer to absorb the potential clock rate difference up to +/- 300ppm.
About the Northwest Logic PCI Express Core
The small size and external PHY support of Northwest Logic's PCI Express IP core enable the development of a very low cost PCI Express solution. In addition, the core's simple user interface, minimal timing constraints and companion testbench make the core very easy to use. The core is now available as part of Lattice's ispLeverCORE Connection program. Northwest Logic also offers a complete PCI Express Development Solution including Reference Design logic, Development Board, Windows and Linux Drivers, and Demonstration Software. Use of this comprehensive development solution can dramatically reduce development cost, schedule and risk.
About Genesys Logic, Inc.
Founded in 1997, Genesys Logic is a fabless IC design house renowned for its leadership in high-speed I/O technologies. In 2003, it became the first company in the world to demonstrate working silicon of a fully PIPE-compliant PCI Express PHY.
Genesys Logic develops its own Physical Layer high-speed SERDES for USB1.1/2.0, PCI Express and Serial ATA products. It has shipped more than 150 million chips in the past eight years. By leveraging its mixed-signal design expertise and system know-how, Genesys Logic provides low-cost, high-performance chips that are also the best in class in terms of power consumption and die size. Genesys Logic's target applications include PC peripherals, Embedded Systems and Consumer Electronics.
Genesys Logic's U.S. office is located at 2860 Zanker Road, Suite 102, San Jose, CA 95134, USA and can be contacted at 1-408-435-8899 or sales@GenesysAmerica.com. For more information about Genesys Logic Inc, visit http://www.genesyslogic.com.
About Northwest Logic
Northwest Logic, located in Beaverton, Oregon, is a provider of high-performance, easy-to-use IP Cores. Northwest Logic specializes in PCI Cores including PCI Express, PCI-X and PCI and Memory Controller Cores including DDR2, DDR and SDR SDRAM. Northwest Logic also provides a comprehensive array of design services including FPGA, Board and Software services. Northwest Logic is a charter member of the Lattice LEADER design services program. For more information about Northwest Logic and its PCI Express Development Solution, visit http://www.nwlogic.com
About Lattice Semiconductor
Lattice Semiconductor Corporation provides the industry's broadest range of Field Programmable Gate Arrays (FPGA) and Programmable Logic Devices (PLD), including Field Programmable System Chips (FPSC), Complex Programmable Logic Devices ( CPLD), Programmable Mixed-Signal Products (ispPAC) and Programmable Digital Interconnect Devices (ispGDX). Lattice also offers industry leading SERDES products.
Lattice is "Bringing the Best Together" with comprehensive solutions for system design, including an unequaled portfolio of non-volatile programmable devices that deliver instant-on operation, security and "single chip solution" space savings.
Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124-6421, USA; telephone 503-268-8000, fax 503-268-8037. For more information about Lattice Semiconductor Corporation, visit http://www.latticesemi.com
|
Related News
- Lattice and Northwest Logic Deliver PCI Express X1, X4 and X8 Solutions
- Aldec's HES UltraScale+ Reconfigurable Accelerator and Northwest Logic's PCI Express Cores Provide Proven PCI Express Solution
- Northwest Logic's PCI Express Gen3 Core and S2C's Virtex-7 ASIC Prototyping Platform fully validated together
- DINI Group Verifies Compatibility of Northwest Logic's PCI Express Cores with Virtex-7 ASIC Prototyping Platforms
- Aldec Verifies Compatibility of Northwest Logic's PCI Express Cores with HES-7 SoC/ASIC Prototyping Platform
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |