Ceva-Waves Bluetooth 5.3 Low Energy Baseband Controller, software and profiles
Pacific Design's VUPU configurable processor IP available on Carbon's VSP validation platform
Update: ARM to Offer Cycle-Accurate Virtual Prototyping for Complex SoCs Through an Asset Acquisition from Carbon Design Systems (October 20, 2015)
Waltham, MA, October 27, 2005 -- Carbon Design Systems, an innovator in virtual system prototyping announced today that Pacific Design—a leading provider of configurable processor IP—has made available its configurable VUPU processor and accompanying instruction set simulator on Carbon’s VSP validation platform. This latest VSP addition enables a system prototype with Pacific’s VUPU to be rapidly assembled and functionally validated on an engineer’s desktop months before silicon.“Our customers need to validate their software with the target hardware implementation. Carbon’s VSP enables data path blocks, IP cores, and our ISS to simulate together”, noted Yoshihide Sugiura, President of Pacific Design. “Carbon is the answer to continuous SOC validation, from early stage architecture performance modeling, to validating the final embedded software before tapeout.”
“Carbon’s platform enables the fastest bring-up of a SOC prototype for software validation on a virtual silicon model”, said Alan Swahn, Vice President of Marketing at Carbon Design Systems. “The combination of Carbon’s VSP and Pacific’s ISS allows designers to explore the optimal balance between algorithms executing in software and accelerating these algorithms in hardware.”
VSP and VUPU Design Flow
Pacific’s VUPU is the combination of a general purpose RISC processing unit and one or more variable-cycle data path execution units or VUs. These VUs are high performance data path co-processors that are configured after profiling the user’s software with Pacific’s MAX profiler. These VUs can also be provided by the user as predefined RTL macros. In a virtual system prototype, the processing unit is modeled as an ISS. The VU hardware functions and any other RTL hardware blocks are automatically compiled by VSP into virtual silicon models. This high-speed SOC validation environment enables embedded software to be validated on a silicon accurate model of the system. Mixing levels of abstraction provides both the performance and accuracy necessary to validate the most complex SOCs. On a recent customer design, the software validation runtime was dramatically reduced from 9 hours on a popular EDA simulator to 40 minutes on VSP.
About Pacific Design
Pacific Design’s VUPU IP product is an application specific custom processor targeted at the consumer electronics and wireless markets. It has two processing units: a general purpose RISC processing unit and a variable cycle data path unit for arithmetic and digital signal processing functions. VUPU enables the customer to meet low power specifications, while providing the required performance. Customers using VUPU can achieve their design goals in less time than a hardwired solution and with a smaller footprint and lower power design than a DSP-based solution.
The company headquarters are located at 2-12-2 Shinyokohama, Kouhokuku, Yokohamashi, Kanagawaken Japan. Telephone: +81-45-477-5011, Fax: +81-45-477-5033, Website: www.pdi.co.jp
About Carbon
Carbon is delivering a high-performance virtual system prototyping solution that enables a system prototype to be rapidly assembled and functionally validated on the desktop months before silicon. Carbon’s new software approach allows multiple levels of abstraction to be validated together including C, SystemC, RTL, IP cores, transaction-level, and instruction-level models. The key to VSP is performance; the ability to execute billions of cycles and boot embedded operating systems, all with desktop software.
The company is headquartered at 375 Totten Pond Road, Suite 100/200, Waltham, MA. 02451. Telephone: 781.890.1500, Fax: 781.890.1711, Website: www.carbondesignsystems.com
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