GNSS (GPS, Galileo, GLONASS, Beidou3, QZSS, SBAS) Ultra-low power RF Receiver IP
Making life easier for multicore SoC software developers
Nov 7 2005 (9:00 AM)
Putting multiple processors on a single chip or on a single board has enabled embedded system hardware designers to provide more features and higher processing speeds using less power, thus solving many design problems. But for software developers - and vendors - this trend presents a daunting set of challenges.
In the embedded environment, the developer is no longer dealing with the familiar balanced, homogeneous and symmetric multiprocessing (SMP) model of servers and large computer systems. Rather, the designer of an embedded or mobile device now may have two, three or four processors to program and debug, a heterogeneous and unbalanced mix of RISC, DSP and network architectures, operating asymmetrically.
Hardware developers at recent conferences have bemoaned the lack of tools and building blocks that are up to the challenge of doing software development in multicore environments. However, many embedded software vendors believe they have solutions to most of the immediate problems. The big question is where to go next as the number of multicores and the heterogeneity of such designs increases.
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