Fraunhofer Extends Commitment to ARC-Based Configurable Processor Technology

MUNICH, Germany and ELSTREE, England, Dec. 5, 2005 - Today, the Heinrich-Hertz-Institute (HHI) of the Fraunhofer-Gesellschaft announced a wide-ranging partnership with ARC International (LSE: ARK) that expands Fraunhofer’s use of configurable processors to further the development and commercialization of consumer products based on Digital Video Broadcast – Handheld (DVB-H) technology. The Digital Video Broadcasting Project (DVB) is an industry-led consortium of over 250 broadcasters, manufacturers, network operators, software developers, regulatory bodies and others in over 35 countries committed to designing global DVB standards.

As part of this partnership, scientists at the renowned Fraunhofer Institute are using the low-power, small-gate count ARC™ 625D core to develop DVB-H chipset intellectual property (IP) that will provide consumers with mobile access to high-quality multimedia content. ARC will gain access to portions of the resulting DVB-H IP from the Fraunhofer Institute’s R&D efforts. DVB-H enabled devices (based on the H.264 and AAC-Plus standards) are expected to deliver DVD-quality video and audio at data rates of less than 1 Mbps. This emerging technology promises to enable full-motion video over wireless, satellite, and ADSL (asynchronous digital subscriber line) internet connections.

“Configurable technology was a natural choice,” said Dr. Benno Stabernack, head of the embedded systems group at Fraunhofer HHI. “By adopting the ARC 625D processor core, our scientists will be able to quickly develop application-specific processors that meet the power consumption and performance needs of emerging multimedia applications for handheld appliances. This type of flexibility allows our designers to quickly adapt to evolving standards and customer requirements.”

“With its reputation as a major developer of multimedia technology, Fraunhofer’s choice of the 625D core to develop a next generation H.264 solution demonstrates the power of configurable computing,” said Derek Meyer, senior vice president of sales and marketing at ARC International. “The ability to add new instructions and remove unneeded functions for a given application provides a two-fold benefit. First, by developing a custom instruction set, Fraunhofer extended its IP into the silicon. Second, it created a design that will be harder to duplicate.”

The Configurable ARC™ 625D Processor Core
The ARC 625D processor core is a full-featured, mid-range embedded core with best-in-class speed, die area and power characteristics. It is designed as a complete processor solution for SoCs targeted at consumer, networking, automotive, and other cost-sensitive markets. Moreover, the ARC 625D core's configurable memory architecture makes it ideal for RTOS-based applications.

An XY memory subsystem and other powerful DSP options of the 625D core enable the elimination of separate logic or DSP blocks, which reduces die size and cost of the SoC. Furthermore, using the ARChitect™ processor configurator custom instruction extensions can easily be incorporated to achieve performance levels unattainable with fixed architecture cores.

About DVB-H
DVB-H builds on DVB-T and is a system where data digital multimedia is transmitted in IP datagrams: “IP Datacasting.” In order to reduce power consumption in small handheld devices, DVB-H employs a technique called “time-slicing,” where the IP datagrams are transmitted as data bursts in small time slots. The front end of the receiver switches on only for the time interval when the data burst of a selected service is on air. Within this short period of time a high data rate is received which can be stored in a device buffer. This buffer can either store the downloaded applications or playout live streams. The power saving achieved depends on the ratio of on/off-time. If there are approximately ten or more burst services in a DVB-H stream the rate of the power saving for the front end could be around 90 percent compared to a standard DVB-T front end. The application cries out for powerful computers that are frugal on power—the perfect application for an ARC configurable core.

About Fraunhofer HHI
The Heinrich-Hertz-Institute of the Fraunhofer-Gesellschaft in Germany’s Capitol Berlin – today with 150 staff members – is famous for its innovations in the field of Image Processing, Photonics and Mobile Communications. With the development of important video coding methods in MPEG, Fraunhofer HHI has reached worldwide recognition. It provides research services on contract basis and technology licensing. The research topics in image processing are:

Image and video coding, 3D image modeling and video processing, image and video analysis and synthesis, computer vision, multimedia transmission and streaming (IP, mobile, DVB) image and video enhancement, real-time implementations of multimedia systems (video, audio, graphics) on DSPs, real-time hardware and IP-design on ASIC and FPGA

The budget of the HHI is financed by projects from industry, the – service sector and public authorities. http://ip.hhi.de/

About ARC International plc
ARC International is the world leader in low-power, high-performance 32-bit configurable CPU/DSP processor cores, subsystems, real-time operating systems and development tools for embedded system design. ARC’s configurable and extendible cores assist customers in the development of next generation digital media, consumer and communications devices, resulting in lower cost, higher performance SoC products.

ARC International maintains a worldwide presence with corporate offices in San Jose, California, USA and Elstree, UK. The company has research and development offices located in England and the United States. For more information please visit the ARC website at: www.ARC.com. ARC International is listed on the London Stock Exchange as ARC International plc (LSE: ARK).