MIPS Technologies Becomes Charter Member of RDL Alliance
MOUNTAIN VIEW, Calif. -- Dec. 15, 2005 -- MIPS Technologies, Inc. (Nasdaq: MIPS - News) today announced it has joined the Register Description Language (RDL) Alliance as a charter member. Formed and chaired by Denali Software, the alliance has been established to promote standardized usage of RDL in the development and delivery of select intellectual property (IP) products used in system-on-chip (SoC) designs. Configuration registers store key parameters that define the operation of the chips, and are required by system architects, hardware developers, and software engineers to develop end products. IP providers and system developers benefit from the alliance by having a common, consistent, computer-readable specification of these registers -- which ultimately speeds architecture, design, verification, and documentation for semiconductor chip designs.
"Standardization of register descriptions in our industry is a key requirement, and long overdue, so we are pleased to be part of this leading-edge consortium," said Mike Uhler, chief technology officer at MIPS Technologies. "The RDL Alliance provides both a language standard and the ability to convert the definitions to any representations required in the hardware or software design process. By shipping RDL descriptions of processor and system registers with our hardware and software products, we simplify the design process and help our customers face the challenges of delivering sophisticated designs to market in minimum time."
"MIPS Technologies is a leading provider of processor and system solutions, and we're delighted that MIPS has chosen to join Mentor and Rambus as a founding member of the RDL Alliance," said Denali CTO Mark Gogolewski. "The RDL descriptions sent to MIPS Technologies' customers will greatly simplify the interchange of design components and accelerate SoC designs. That's good news for the industry."
Alliance Benefits for IP Providers
Commercial IP vendors benefit from the alliance in two key dimensions. For IP development, alliance members gain access to Denali's Blueprint(TM) product that takes RDL input and automatically generates documentation, register designs in Verilog or VHDL, as well as models for verification and software development. The auto-generation of all necessary register views through Blueprint provides significant productivity gains for IP design, and increases overall quality through a correct-by-construction methodology.
Alliance members also benefit from improved quality and reduced cost for customer support. Blueprint provides an abstraction layer that insulates customers from design or architectural changes during IP modifications or derivative designs. The abstraction layer creates stable environment for early hardware and software development. Blueprint also enables IP vendors to auto-generate outputs that support the various methodologies and 3rd party development tools used by end-customers. All of these translate into higher-quality support, and faster turnaround time for integration issues.
Alliance Benefits for IP Consumers
The vast number of control registers found in any complex IP or chip design essentially defines the software interface to the chip -- and usually represents the largest portion of the chip specification or programmers guide. Vendors delivering RDL with their IP products are enabling their customers with instant access to customizable views of registers for internal hardware design, software development, and documentation. This eliminates the tedious and error-prone process of manually redeveloping register views to conform to internal requirements from the various development teams. SoC developers typically integrate multiple IP cores from multiple vendors. The availability of consistent, high-quality register views speeds integration of 3rd party IP, increases design efficiency and reduces the overall cost of IP deployment.
About the RDL Alliance
For more information on how to join the RDL Alliance, or how to benefit from the RDL Alliance community, please visit http://www.rdl-alliance.org.
About MIPS Technologies, Inc.
MIPS Technologies, Inc. is a leading provider of industry standard processor architectures and cores for digital consumer and business applications. The company drives the broadest architectural alliance that is delivering 32- and 64-bit embedded RISC solutions. The company licenses its intellectual property to semiconductor companies, ASIC developers, and system OEMs. MIPS Technologies, Inc. and its licensees offer the widest range of robust, scalable processors in standard, custom, semi-custom and application-specific products. MIPS Technologies, Inc. is based in Mountain View, California, and can be reached at 650-567-5000 or www.mips.com.
|
Related News
Breaking News
- Tenstorrent Expands Deployment of Arteris' Network-on-Chip IP to Next-Generation of Chiplet-Based AI Solutions
- Siemens' Tessent In-System Test software enables advanced, deterministic testing throughout the silicon lifecycle
- EnSilica plc - Audited Full Year Results for the Year Ended 31 May 2024
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
Most Popular
- Arm's power play will backfire
- Siemens strengthens leadership in industrial software and AI with acquisition of Altair Engineering
- Sondrel announces CEO transition to lead next phase of growth
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
E-mail This Article | Printer-Friendly Page |