5V Library for Generic I/O and ESD Applications TSMC 12NM FFC/FFC+
Bluespec Joins The SPIRIT Consortium to Advance IP Reuse Interoperability Standards for SoC Design
EDA Company Adds ESL Synthesis Expertise to Further Standards Development
Waltham, Mass. – January 17, 2006– Bluespec Inc., developer of the only ESL synthesis toolset for control logic and complex datapaths in chip design, has joined The SPIRIT Consortium with the goal to advance interoperability standards for intellectual property (IP) reuse in system-on-chip (SoC) design.
Bluespec’s decision to become a member of The SPIRIT Consortium, a global organization focused on establishing multi-faceted IP/tool integration standards that drive sustainable growth in electronic design, was due to The Consortium’s design reuse standardization efforts. “We’re active promoters of design reuse and interoperability,” says George Harper, Bluespec’s vice president of marketing, who notes that its underlying synthesis technology automates many aspects of reuse. “We are eager to contribute our expertise to The SPIRIT Consortium.”
Adds Ralph von Vignau, chairman of The SPIRIT Consortium: “The Consortium welcomes Bluespec. Their understanding of the flow from ESL design to implementation will be helpful to the Consortium as we extend our current specification to cover comprehensive interoperability between tools and support of ESL.”
About Bluespec
Bluespec, Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high quality RTL, without compromising speed, power or area. The toolset, the only one focused on control and complex datapaths, allows ASIC and FPGA designers to significantly reduce design time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on www.bluespec.com or by calling 781-250-2200.
|
Related News
- SPIRIT Consortium drives IP re-use and interoperability with release of specification
- BoS Semiconductors joins UCIe Consortium for its ADAS chiplet SoC family
- proteanTecs Joins UCIe™ (Universal Chiplet Interconnect Express™) Consortium to Advance 2.5D/3D Interconnect Monitoring
- Industry Leaders to Establish Open Interconnect Consortium to Advance Interoperability for Internet of Things
- Standards Organizations Accellera and The SPIRIT Consortium Complete Merger
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |