ESL needs more work, panelists say
(02/09/2006 2:11 PM EST)
SANTA CLARA, Calif. — Electronic system level (ESL) design tools and methodologies have value, but many capabilities have yet to be developed, according to users and vendor representatives at a panel at the DesignCon 2006 conference here Wednesday (Feb. 8).
The panel was entitled "The bottom-line business impact of ESL: getting the right architecture right." Moderator Daya Nadamuni, analyst at Gartner Dataquest, described three ESL design methodologies identified by Dataquest — algorithmic, processor/memory, and control logic.
Jack Donovan, co-founder of training firm ESLX, said that customers are looking for requirements traceability, early software development, reuse of verification models, and behavioral synthesis.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset