Semi industry reconstruction to launch in Japan
Semi industry reconstruction to launch in Japan
By Yoshiko Hara, EE Times
September 22, 2000 (5:40 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000922S0021
TOKYO The Electronic Industries Association of Japan (EIAJ) is poised to launch a five-year program to support the struggling Japanese semiconductor industry, including design and process technologies required for system-on-chip products. The Asuka program will consolidate a number of existing semiconductor research programs and is expected to be funded to the tune of about $717 million over five years, said a source familiar with the EIAJ announcement, which was expected late this week. Funding comes from private industry. The plan is based in part on cooperation with the Super Clean Room project led by the Ministry of International Trade and Industry (MITI). MITI will build the advanced clean room by March 2002 and rent out a portion of the space to private research projects, including extreme-ultraviolet (EUV) and electron-beam lithography development projects. The Super Clean room will function as the base not only for MITI's fund amental technology research but also for Asuka. The Asuka project was proposed by the Semiconductor in the New Century Committee (SNCC), chaired by Tsugio Makimoto, a longtime Hitachi Ltd. executive who is soon to become an adviser to Sony Corp. The clean room will be built in Tsukuba, the "science city" north of Tokyo, at the site of a MITI affiliate agency. MITI has budgeted about $165 million to build a clean room large enough from 3,000 to 4,000 square meters to accommodate the Asuka-supported research projects funded by the participating companies. "MITI's fundamental research projects will use about 1,000 square meters. So we are planning to rent the remaining space for R&D activities of the private sector," said Takeshi Kawamoto, deputy director of MITI's industrial electronics division. MITI is expected to invite companies and groups doing research in Japan to also join in. In addition, a privately funded consortium to establish 300-mm wafer-manufacturing technology, the Se miconductor Leading Edge Technologies (Selete), is planning to move from its current base in a rented portion of a Hitachi research lab in Yokohama to the Super Clean room in Tsukuba. Selete is one of two joint research organizations that will be reformed and reinforced under Asuka. The other is Semiconductor Technology Academic Research Center (Starc), which supports joint research between universities and industry. MITI is supporting a number of other semiconductor-related research projects that will also move to the Super Clean room. For this year, MITI has appropriated about $42 million for research for the 70-nanometer (0.7-micron) technology node expected to debut in 2005 and the subsequent 50-nm node coming in 2007. The project extends over seven years and involves materials, process, measurement, analysis and diagnostic techniques. Another $14 million will go toward a three-year research project related to IC production equipment. For development of EUV and electron-beam direct-write lithog raphy, MITI has earmarked $20 million. All those projects will move to the Super Clean room, which MITI sees functioning as the bridge for collaboration between government, the private sector and universities. To stop decline The increased support for cooperative research stems from Japan's decades-long decline. In the mid '80s Japan surpassed the United States in semiconductor production, but throughout the '90s, competition from Taiwan, Korea and Western nations has intensified to the point where Japan-based companies now hold less than a 30 percent share of worldwide production. "The situation for Japan is very difficult, almost critical, if we continue to lose our competitiveness in semiconductors," said Makimoto. "Our mindset, our ways of thinking, have to change if we are to recover." The SNCC issued a proposal in March on how to reform and reconstruct Japan's semiconductor industry. It proposed that companies share basic technologies such as fine-geometry process tech nology of less than 100 nm. "This kind of technology will be a common platform for manufacturers to use for system-on-chip ICs," Makimoto said. "We want to concentrate on basic common technologies, to be developed jointly, so that we can save on total costs. Individual product strategies should be created by each company."
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