Innovative Silicon Inc. Ramps for Growth of Z-RAM Memory IP with New Silicon Valley Headquarters
Santa Clara, CA 95054
408-969-2366
"By relocating our U.S. headquarters to a larger facility we are able to provide more room for growth, allowing us to increase our sales staff and work closer with existing and potential customers," said Mark-Eric Jones, president and CEO of Innovative Silicon. "We're excited about our recent milestones and are looking forward to continuing to engage with companies designing microprocessors and SoCs with high memory requirements targeted for the SOI process."
ISi last month announced AMD as a new customer, with AMD contracting to purchase a Z-RAM embedded memory full technology license for potential use in its future microprocessor products. At the same time, ISi also announced that it had achieved silicon validation of its Z-RAM memory arrays on 90nm SOI process technologies, and validation of its memory bitcell (which requires only one transistor and zero capacitors) in an additional ten fabrication processes that include 130nm SOI, 90nm SOI, and FinFET technologies. ISi expects to demonstrate working silicon in multiple 65nm processes later this quarter.
Late last year, ISi named Jerry Ardizzone, former president of ARM USA, as its VP of sales, followed by the appointment of Yuji Okamoto, director of business development, Japan, and Jeff Lewis, VP of marketing.
"ISi's Z-RAM memory IP was created for designers looking to meet increasing on-chip memory requirements while maintaining the same die size and cost basis of earlier designs," said Lewis. "The density and performance advantages of Z-RAM make it the ideal solution for designers using large blocks of embedded memory or looking to reduce silicon costs for designs with fewer memory requirements."
Z-RAM Background
ISi's Z-RAM technology was created to solve one of the biggest challenges for SoC designers, how to shrink die sizes when memory dominates chip area and cost. With ISi's Z-RAM (one transistor, zero-capacitor technology), IC manufacturers gain the benefit of having more dense memory which in turn means their SoCs, developed on SOI, can be produced at lower cost than those on bulk CMOS.
About Innovative Silicon
Incorporated in 2002, Innovative Silicon was founded to develop and commercialize Floating Body effect memory for SoC/MPU products used in diverse applications including microprocessors, handheld computers, games consoles, cellular communications devices, and cameras. The company closed its first round of VC funding in 2003, completed its first 90nm megabit Z-RAM memory designs in 2004 and its first 65nm designs in 2005. The company is incorporated in the USA with R&D in Lausanne, Switzerland. For more information see http://www.z-ram.com.
|
Related News
- Innovative Silicon's Z-RAM Ultra-Dense Memory Now Backed by 21 Patents
- Innovative Silicon's Z-RAM Ultra Dense Memory IP Now Backed by 10th Patent; Memory Innovator Has 41 Additional Patents Pending and 5 U.S. Applications Allowed
- Innovative Silicon Announces Jeff Lewis Will Head Worldwide Marketing; IP Industry Innovator Rounds Out Executive Team for Z-RAM Embedded Memory Company
- Innovative Silicon Inc. Announces Silicon Validation of Z-RAM Technology
- Innovative Silicon launches new Z-RAM technology that doubles embedded DRAM density for SoCs
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |