Adaptive Clock Generation Module for DVFS and Droop Response
Temento Systems announces the support of System Verilog Assertions among the new features of DiaLite Platform Edition and of TemStorage
1- System Verilog Assertions support
2- State-Machine Viewer
3- TemStorage External Memory Data Management Solution
DiaLite Instrumentation : Platform Edition Revision 4.6
A System Verilog Assertion (SVA) Checker module is now available completing the PSL module to enable At Speed properties verification, directly on the chip. Major features and improvements include System Verilog Assertions support (System Verilog 3.1 from Accellera), automatic generation and insertion of the assertions and properties debug manager.
This edition takes advantage of the DiaLiteTM Instrumentation benefits and of a common HDL generation layer.
System Verilog or PSL On Chip Verification (OCV) will allow designers to create properties (A Boolean & temporal set of expressions describing system behaviour) that address their design checking requirements. Translation of properties into VHDL/Verilog languages enables to generate IP Assertion Checker Verification Units (ACVU).
Those units are then embedded into the user's design. The verification is performed directly on the chip and runs at design speed.
The State-Machine Viewer (SMV) is a new facility that will drastically improve the observability of code and the code errors tracking. The SMV automatically extracts all the State-Machines from the code under verification. A graphical view represents all the state-machines that the designer wants to monitor.
The progress is made either from a state to the following one or from a watch-point to the other one.
Adding this new code viewer tool to the HDL Fault Finder, the debug session is now more productive than ever.
TemStorage : FPGAs deep signals storage with 1GByte external memory board
With this product, we provide the best tool for storing and managing data coming from a FPGA test session. Delivering up to 10 Gbits/sec data bandwidth and 1 GByte DDR2, TemStorage allows to capture and to store large test sequences and to export them towards DiaLiteTM Instrumentation through a USB interface for viewing and analyzing.
Bus larger than 200 signals can be stored with a frequency up to 100 MHz.
Perfectly Integrated into DiaLiteTM environment, TemStorage is seen as a dedicated IP and can be connected to other accessible Debug IPs.
About Temento Systems
Temento Systems S.A. provides Electronic Design and Test Automation (EDTA) solutions that enable engineers to test and debug electronic products, including System on Chip (SoC), FPGAs, Boards, Multi-Chips Modules (MCMs) and Systems. Unlike traditional EDA software providers, Temento Systems offers a broad range of solutions focused on systems design test, starting from the earliest stage of design definition (virtual test), straight through hardware testing (physical test).
http://www.temento.com
|
Related News
- Temento Systems announces the release of DiaLite Platform Edition introducing PSL On Chip Verification (OCV)
- Avery Continues to Drive CXL Adoption with New Virtual Platform Features in Support of Version 3.0
- Cadence Expands Virtuoso Platform with Enhanced System Design, Advanced Node Support down to 5nm, and Simulation-Driven Layout
- Temento Launches an Innovative Business Model for Its 'Dialite' Debug Platform
- Renesas Technology and Express Logic Launch Real-time Control and Signal Processing Platform With File System, Networking, and High-speed USB Support
Breaking News
- Alphawave Semi Audited Results for the Year Ended 31 December 2024
- BrainChip Gives the Edge to Search and Rescue Operations
- Shifting Sands in Silicon by Global Supply Chains
- Analog Bits to Demonstrate IP Portfolio on TSMC 3nm and 2nm Processes at TSMC 2025 Technology Symposium
- Equal1 advances scalable quantum computing with CMOS-compatible silicon spin qubit technology
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- Intel Announces Strategic Investment by Silver Lake in Altera
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- AMD Achieves First TSMC N2 Product Silicon Milestone
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |