National Semiconductor and ARM Release Next-Generation PowerWise Interface Open-Standard Specification
New PWI 2.0 Specification provides enhanced two-wire power management interconnect for feature-rich, multi-domain SoCs
SANTA CLARA, Calif. AND CAMBRIDGE, UK – Feb. 21, 2006 – National Semiconductor Corporation (NYSE:NSM), and ARM [(LSE: ARM); (Nasdaq: ARMHY)], today announced the availability of the second-generation PowerWise™ interface (PWI) specification, which provides enhanced power management interconnect capability to feature-rich, multi-domain system-on-chips (SoCs) in battery-powered, handheld electronic devices. As an extension of PWI 1.0, PWI 2.0 adds multi-domain capability to address emerging needs of highly integrated SoCs.
To extend battery life in handhelds with increased functionality, device manufacturers require advanced power management techniques to dynamically optimize the power consumption of each individual function inside a feature-rich SoC. To enable system designers to efficiently implement such complex designs while maintaining low pin-count, National Semiconductor and ARM, in collaboration with adopters such as Matsushita Electric Industrial, Philips Semiconductor, Samsung Electronics and ST Microelectronics, developed the second-generation PowerWise interface specification.
“The PWI 2.0 specification is a significant approach to enable power control efficiencies required for rich multimedia applications with tight power budgets,” said Timo Komulainen, director of Mobile Solutions, Semiconductor Business at Samsung Electronics. “This technology standard will support power-efficient features and key characteristics in the mobile-centric IT industry.”
The PWI specification enables rapid deployment of advanced power management solutions in battery-powered handheld electronic devices by providing an open, industry-wide standard for the interconnect between digital SoCs and power management integrated circuits (PMICs). Since the release of the first-generation specification two years ago, the complexity of digital SoC architectures has increased significantly as more and more functionality is embedded into battery-powered devices such as mobile phones, handheld gaming consoles and portable media players.
“The PWI 2.0 standard enables simple two-wire implementation of advanced power management technologies such as adaptive voltage scaling and back-biasing in multi-domain architectures,” said Ravindra Ambatipudi, director of Advanced Power Products, National Semiconductor. “PWI 2.0 technology enables device manufacturers to offer new processor-intensive features such as digital multimedia processing and broadcasting with improved battery life while maintaining supply-chain flexibility.”
“The PWI 2.0 specification is built upon some of the solid foundations found in the field-proven PWI 1.0 technology. The lessons learned, along with valuable input from leading suppliers in the mobile and consumer industries, have directly resulted in the development of PWI 2.0 technology. This reflects the continued collaboration between ARM and National Semiconductor to be at the forefront of low-power technology design,” said Kevin McIntyre, product manager for Power Management Solutions, ARM. “Power management complexity in battery-operated systems is rapidly increasing. The evolution of the PWI standard is important because it accelerates deployment of innovative power management technologies and solutions.”
About the PowerWise Interface Specification
Introduced in October 2003, the PowerWise interface specification defines a two-wire serial bus connecting SoCs with PMICs. The interface is specifically defined to provide master-to-slave communication, which is optimized for control of a voltage regulation system that enables system designers to dynamically adjust the supply and back-bias voltages on digital processors.
The PWI specification defines the required functionality in the PWI-slave; the operating states, the physical interface, the register set, the command set and the data communication protocol for messaging between the PWI-master(s) and the PWI-slave(s). The PWI command set includes PMIC operating state control, register read, register write and voltage adjust commands. The specification also provides a provision for user-defined registers in the PWI-slave.
The PWI 2.0 specification maintains the low-power, low-latency, high-bandwidth capabilities of the PWI 1.0 specification, while providing flexibility with an increased PMIC register addressing space, expanded command set and provisions for a multi-point bus with two masters and up to 16 logical PMIC slave connections on one or more PMIC devices.
Cost and Availability
Available now, the PWI 2.0 specification is royalty- and license-free. To adopt the specification, download and submit the agreement here www.pwistandard.org.
The PWI 2.0 specification-compliant, on-chip power controller intellectual property (IP) will be available from National and ARM for licensing and delivery in the second quarter of 2006. The IP complements ARM® Intelligent Energy Manager™ technology, which includes ARM Artisan® Physical IP, AMBA®3 AXI™ interconnect, IEM software and hardware.
National Semiconductor will launch PWI 2.0 specification-compliant external power management integrated circuits in the second half of 2006.
About National Semiconductor
National Semiconductor, the industry's premier analog company, creates high-value analog devices and subsystems. National's leading-edge products include power management circuits, display drivers, audio and operational amplifiers, communication interface products and data conversion solutions. National's key markets include wireless handsets, displays and a variety of broad electronics markets, including medical, automotive, industrial, and test and measurement applications. Headquartered in Santa Clara, California, National reported sales of $1.91 billion for fiscal 2005, which ended May 29, 2005. Additional company and product information is available at www.national.com.
About ARM
ARM designs the technology that lies at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM’s 16/32-bit RISC microprocessors, data engines, peripherals, software and tools, combined with the company’s broad Partner community, provide at total system solution that offers a fast, reliable path to market for leading electronics companies. More information on ARM is available at http://www.arm.com.
|
Arm Ltd Hot IP
Related News
- National Semiconductor and ARM Release PowerWise Interface Open-Standard Specification
- Hynix Semiconductor, LG Electronics, Samsung Electronics and Silicon Image Sign Long-Term Agreement to Create the Next-Generation Memory Interface Technology Specification
- Tata Consultancy Services and Renesas Partner to Open Innovation Center to Develop Next-Generation Semiconductor Solutions
- Sonics Joins HSA Foundation to Help Drive Open Standard for Next-Generation Heterogeneous Computing
- Javelin Semiconductor chooses Kilopass Non Volatile Memory Intellectual Property Core for MIPI RFFE Digital Interface in Next-Generation CMOS Power Amplifiers
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |