Cadence Releases Proven Reference Methodology for New ARM Cortex-R4 Processor

ARM/Cadence Partnership Adds Reference Methodology Implementation Support for Latest ARM Synthesizable Processor as Part of Expanded Portfolio

SAN JOSE, CA -- May 15, 2006 -- Cadence Design Systems, Inc. today announced it has significantly expanded its Reference Methodology flow support of ARM® processors to include the new Cortex™-R4 processor. The expanded Reference Methodology is the latest result of the close collaboration between Cadence and ARM. The extended ARM-Cadence® Encounter® Reference Methodology now supports both synthesizable Cortex processors and is based on the Cadence Encounter digital IC design platform.

Cadence and ARM jointly developed and validated this extended Reference Methodology in an extremely short time to offer customers the highest possible quality and design capabilities. The ARM-Cadence Reference Methodology portfolio now supports the ARM Cortex-R4 processor, Cortex-M3™ processor, and all ARM7™, ARM9™ and ARM11™ processor families.

"This Reference Methodology is proof of the breadth and strength of our relationship with Cadence," said Keith Clarke, vice president of technical marketing director at ARM. "This expanded, jointly developed Reference Methodology provides our mutual customers with the value of quick core adoption. This is an important vehicle for use with our new Cortex-R4 processor, which targets embedded real-time systems for mass storage, automotive, industrial and networking applications."

The expanded ARM-Cadence Encounter Reference Methodology offers numerous benefits for ARM processor-based system on chip (SoC) designs. The flow has been pre-validated with ARM Artisan® Physical intellectual property (IP) and is optimized to reduce the effort required to implement ARM synthesizable processor IP, while the silicon-proven Cadence Encounter digital IC design platform helps deliver predictable results.

The ARM-Cadence Reference Methodology offers signal integrity (SI) analysis and repair to minimize risk and speed time to volume. It generates models required for end users to integrate ARM processors into their SoCs. Cadence technologies supported in this Reference Methodology include Cadence SoC Encounter®, an integrated RTL-to-GDS hierarchical chip implementation system ideal for large-scale and low-power designs. The fully scripted flow also allows user customization where required.

"The new Cortex-R4 processor represents yet another important element in ARM's popular and growing product line," said Eric Filseth, vice president of Product Marketing at Cadence. "The ARM-Cadence Encounter Reference Methodology is the result of a deep partnership that includes direct feedback and validation from ARM. With this methodology, we're able to provide our customers a proven design flow to implement ARM products in the most efficient manner possible."

The ARM-Cadence Encounter Reference Methodology provides a predictable route to silicon and a basis for customer methodology development using both logical and physical technologies. It enables rapid technology-specific implementation and streamlines the development of designs based on ARM processors. By delivering a powerful, automated RTL-to-GDSII implementation flow for ARM Partners, the methodology increases nanometer design efficiency and reduces time to silicon with predictable performance, power, and area results.

In September of 2005, ARM and Cadence announced the Cadence® Optimization Methodology Kit for ARM Processors which massively simplifies the implementation techniques used to achieve higher performance, lower power and less area (PPA) for ARM processor-based designs. The ARM-Cadence Reference Methodology is immediately available from ARM. More information can be found at http://www.cadence.com/partners/ip_program/arm.aspx.

About Cadence

Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics systems. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, printed-circuit boards and systems used in consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2005 revenues of approximately $1.3 billion, and has approximately 5,000 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

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