The S5 Series offers 64-bit RISC-V performance with 32-bit power and area
Distinguished microprocessor architect, Keith Diefendorff, joins ARC Cores in research role
Distinguished microprocessor architect, Keith Diefendorff, joins ARC Cores in research role
Diefendorff began his career in 1975 at Texas Instruments, where he designed systems, processors, and integrated circuits for minicomputers and AI workstations. He has an MSEE from the University of Akron and is a member of the IEEE and the Computer Society. He has over 25 years of industry experience as a microprocessor architect and holds seven U.S. patents. Before joining MDR two years ago, Diefendorff was a distinguished scientist and the director of microprocessor architecture at Apple Computer, where he was the architect of the AltiVec multimedia extensions to the PowerPC. Diefendorff joined Apple in 1996 from NexGen/AMD, where he was director of technical strategy for x86-compatible microprocessors.
Prior to NexGen, Diefendorff was a senior member of the technical staff in Motorola's RISC division in Austin. Diefendorff was on the negotiating team that created the PowerPC partnership with Apple and IBM; he lead the definition of the PowerPC architecture for Motorola, and served as Motorola?s chief PowerPC architect. He originally joined Motorola in 1988 as chief architect of the 88110 RISC microprocessor.
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