400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Inapac Technology and eSilicon Partner on SiP Program; eSilicon to Offer Inapac SIPFLOW Memory IP and Methodology to Enable SiP Applications
SAN JOSE and SUNNYVALE, CA -- June 2,2006 -- Inapac Technology, Inc., and eSilicon Corporation today announced that eSilicon has added Inapac's proven SiPFLOW™ design-for-test (DFT) intellectual property (IP) to its technology portfolio. With the SiPFLOW platform, eSilicon's custom integrated circuit (IC) customers can quickly and cost-effectively implement system-in-package (SiP) devices for use in high-volume applications that require the reduced form factor of a single-package implementation.
The Inapac SiPFLOW platform makes it easier and less expensive to integrate memory into SiP and multi-chip package (MCP) devices, combining SiP/MCP-optimized memory IP with a complete, integrated test infrastructure. The methodology eliminates much of the extra cost involved in producing known good die (KGD), and results in unsurpassed final-product reliability levels. Inapac has proven its DFT IP with a low-power, 16M-bit SDRAM design that has been used in more than 10 million shipped units.
"Adding Inapac's industry-proven SiPFLOW platform to eSilicon's broad IP portfolio will provide our customers with significant benefits," said Hugh Durdan, Vice President of Marketing, eSilicon. "The combination of eSilicon's custom chip expertise and our SiPFLOW platform-enhanced IP portfolio will enable the industry's leading electronics companies to quickly and cost-effectively implement small form-factor ICs for their high-volume applications."
The Inapac SiPFLOW platform addresses the challenges of ensuring the quality of KGD memory components and achieving consistent, reliable system assembly. To support these goals, it integrates a unique and proprietary test bus that allows for full test without burn-in, as well as testing of the finished SiP/MCP.
"We're pleased to partner with eSilicon to address memory requirements for high-volume consumer applications," said Richard Egan, CEO of Inapac. "Inapac's IP and methodology enable media-rich capabilities in consumer devices at highly attractive price points."
Availability
The SiPFLOW platform is available now through eSilicon. For more information please contact a local sales office or visit www.esilicon.com.
About eSilicon
eSilicon designs and manufactures custom integrated circuits for the world's leading electronics companies. The company serves both system OEMs and fabless semiconductor companies who apply custom silicon to create innovative new products. eSilicon designs and ships custom chips for a wide variety of markets and applications, including high-volume MP3 players, home gateways, complex storage networks and high-speed communications devices.
Established in 2000 and led by a team of industry veterans, eSilicon is a pioneer and award-winning market leader, widely recognized for innovation and operational excellence. The company combines in-house design and manufacturing expertise to provide customers with a low-cost and lower-risk, path to best-in-class technology. eSilicon is headquartered in Sunnyvale, CA, with offices in Allentown, PA; New Providence (Murray Hill), NJ; Shin Yokohama, Japan; and Bucharest, Romania. For more information, please visit www.esilicon.com.
About Inapac
Inapac Technology, Inc., is a leading provider of technology and services for system-in-package (SiP) and multi-chip package (MCP) applications. It is focused on providing IP to enable the production of reliable, cost-effective memories optimized for SiP/MCP. Products based on the company's patented SiPFLOW platform are licensed to semiconductor and systems companies to enhance the performance, quality and reliability of products in the cell phone, consumer audio/video, digital imaging, and storage markets. Inapac is headquartered in San Jose, California with additional offices in Boise, Idaho and Hsinchu, Taiwan. For more information, visit the company's website at www.inapac.com.
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