Synopsys' Module Compiler Slashes Design Time and Boosts Performance of SiCOM's New Broadband Wireless Modem

Synopsys' Module Compiler Slashes Design Time and Boosts Performance of SiCOM's New Broadband Wireless Modem

Software Enables SiCOM to Broaden Customer Base

MOUNTAIN VIEW, Calif., August 17, 2000 -- Synopsys, Inc. [Nasdaq:SNPS] today announced that SiCOM, a leading provider of modem semiconductors for broadband wireless communications systems, used Synopsys' powerful automated datapath synthesis tool, Module Compiler(TM), to design its new SM7060 PSK/QAM modulator chip. Designed for fixed broadband wireless communications equipment, the SM7060 contains 20 times more gates and was designed in 30 percent less time than SiCOM's previous design.

Fast Synthesis Speeds Exploration

Before Module Compiler, SiCOM engineers used a variety of design tools and languages, including C++, MatLab and Verilog. However, this approach was both tedious and time-consuming. Module Compiler allowed them to describe blocks at a much higher functional level, then use its fast synthesis speed to explore different architectures, trading-off performance and area requirements. "The parameterization and fast results allowed us to respond within an hour or so as to the feasibility of customer requests. And the replicate function of Module Compiler was a blessing," says Eric Brombaugh, a senior staff engineer.

New Architecture with More Gates--In Less Time

The benefits of using Module Compiler are measurable. The previous design took 18 months, yet had limited fixed functionality. Using SiCOM's previous process technology, the design used 15K gates and 76Kb of memory. In contrast, the SM7060 design took only 12 months, even though an entirely new architecture was developed. Using their latest process, the SM7060 used 318K gates and 55Kb of memory. New functionality included programmable filters, a higher data rate, support for more modulation modes and vastly more flexibility. "Instead of the usual five to ten gates per line of code, we were able to achieve 10K-15K gates per line of code," states Phil Hoppes, director, silicon product development. "We anticipate the next chip will require four to five months less time to design thanks to Module Compiler."

Module Compiler Enables SiCOM to Stay Ahead of the Competition

Module Compiler allowed SiCOM to meet its three primary goals of higher performance, faster time to market and a broader customer base. "With our new SM7060 chip, we can now service a broader base of customers and compete against any solution on the market," says Ken Schultz, vice president marketing and sales. "The SM7060 is a key component for the growth of our business. With our core technology and expertise, and Synopsys' Module Compiler, SiCOM will be able to stay ahead of our competitors."

About Module Compiler

Module Compiler is used for creating optimized, high-performance datapath designs for use in an ASIC design flow. In addition to providing major productivity and performance enhancements for "regular" datapaths, it also provides excellent results for modern "irregular" datapaths, which are typically complex, large and contain distributed control and memories. For the experienced designer, Module Compiler provides the quickest path to performance while maintaining technology independence and a high level of reuse. For more information, visit the Module Compiler website at http://www.synopsys.com/products/datapath/datapath.html.

About Synopsys

Synopsys, Inc. [Nasdaq: SNPS], headquartered in Mountain View, California, creates leading electronic design automation (EDA) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems and systems on a chip. Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers. Visit Synopsys at www.synopsys.com.
 
 

Previous Page