Denali Announces Silicon-Proven PCI Express Design IP Product

Next-Generation Design IP Benefits from Denali's Robust Verification, Compliance Technology

PALO ALTO, Calif., June 19, 2006 -- Denali today reported the success of its PCI Express (PCIe) design core in production silicon, and announced availability of its latest intellectual property (IP) product, a fully featured design core for PCIe technology.

Denali leveraged its leadership role in PCIe verification solutions to now offer a comprehensive IP core that incorporates next-generation technology for both IP configuration and advanced design verification. The new PCIe core provides hardware developers with a comprehensive, silicon-proven solution for deploying PCI Express technology. Denali's PCI Express products leverage market-proven verification technology to deliver high-quality IP, which translates into significant reductions in risk and time to market for chip developers.

More product details and a PCIe market overview are provided in a webcast at: http://www.denali.com/pcieip

"Having the number one verification IP for PCI Express is a big advantage for producing quality design IP," said David Lin, Denali's general manager of PCI Express products. "We've done more PCI Express design verification than anyone else in the market. This experience along with the IP configuration technology from our DDR memory controller IP serves as a strong foundation for deploying high-quality design PCIe IP.

"As with any new standard, hardware developers suffered from quality and integration issues associated with the first generation of PCI Express design cores. We set out to solve these issues by taking the lead in developing and verifying this next-generation IP solution for PCI Express. I think we've done a good job."

"With its verification IP products and participation in the PCI-SIG, Denali has contributed to the successful deployment of PCI Express into the marketplace," said Al Yanes, PCI-SIG chairman. "PCI-SIG works with members like Denali to help enable a thriving ecosystem where member companies can make meaningful contributions to the success of PCI Express technology. We are pleased that Denali has extended its PCI Express product offerings to include design IP."

The new product is now part of Denali's Databahn™ line of IP, which also includes configurable memory controller IP for DDR and Flash memory. Denali's PCIe core has been implemented in production silicon and successfully deployed in the leading OEM server products. The core has also been extensively tested with all major chipsets and motherboards.

Databahn PCI Express IP Products
Databahn PCIe IP is a dual-link, dual-mode core that provides an 8-lane interface at the physical layer (20Gb/s). It can be configured as a single link supporting x1, x2, x4, or x8 operations, or as dual-links independently configured for x1, x2, or x4 operation.

In the single link mode, the core may be configured as a PCIe Endpoint (EP) or Root Complex (RC). In the dual-link mode, both links can be configured as EPs, or one link can be configured as an RC, the other as an EP. At the physical layer, the core provides an 8-lane PIPE-compatible interface to SERDES devices, with an 8- or 16-bit data width per lane. At the transaction layer, it provides a 64-bit data interface.

Denali's Databahn PCIe core supports the PCIe 1.1 standard, as well as preliminary PCIe 2.0 specifications. Deliverables include synthesizable register transfer level (RTL) code, scripts for synthesis and static timing analysis, layout guidelines, compliance tests and complete documentation. It is verified using Denali's industry standard PureSpec™ verification IP and PureSuite™ compliance suites. Databahn IP is library independent and covers solutions from 130nm to 45nm technologies.

More information about Databahn is available online at: http://www.denali.com/databahn

Other Databahn IP Products
Licensed for use in more than 170 chip designs, Databahn memory controllers are the industry's leading IP solution for deploying DDR and Flash memory systems. Databahn IP cores offer configurability and programmability to deliver optimal performance for a wide range of end applications, and offer compatibility with all the latest devices from leading memory vendors.

Databahn memory controllers are silicon proven in more 65 chips, spanning 18 process nodes, and support a wide range of device architectures, including the latest SDRAM, DDR1, DDR2, DDR3, Mobile-DDR DRAM, NAND, and OneNAND flash devices.

More information about Databahn is available online at: http://www.denali.com/databahn

About Denali
Denali Software Inc. is the world's leading provider of Electronic Design Automation (EDA) and Intellectual Property (IP) products for design and verification of semiconductor chip interfaces. Its Databahn™ products provide optimal control and data throughput for PCI Express, and DRAM and Flash memory devices. Spectra™ is a fully featured flash file system for NAND and NOR memory systems. PureSpec™ and MMAV™ verification IP support all standard interfaces, including DRAM, Flash, PCI Express, USB, Ethernet, Serial ATA, CE-ATA, AXI, and PLB. Denali's Blueprint™ SystemRDL compiler provides a complete solution for on-chip register specification and management. For more information, visit Denali at http://www.denali.com, call (650) 461-7200 or email info@denali.com.