eMemory Technology Inc. announces the launch of Neobit one-time programmable (OTP) IP on 0.15-micron high voltage process
Neobit OTP in HV process aims for circuit trimming and design parameter tuning in HV process-manufactured IC's, such as LCD driver IC, analog IC and power management IC. Its in-field and on-chip programmability not only allows chip developers and users to adjust critical parameters for module quality improvement after package or assembly, Neobit OTP in HV process also helps improve production yield and chip capability, realizing customization to meet users' exact specifications. In addition, Neobit OTP in HV process can be used for program code storage, such that smart power management IC of great market potential can benefit from this IP with great flexibility and easy code access.
According to iSuppli, the market for LCD driver IC accounted to an estimated US$370 million for an increase of 120% from 2004 and will continue to grow rapidly. Other market researchers predict that the power management IC market will rise to US$15 billion at a compound annual growth rate of 15%. These flourishing markets have prompted eMemory to collaborate with worldwide foundries to offer verified Neobit technology with customized circuit design service. Due to the high portability and simplicity of Neobit OTP in HV process, IC products with this IP inside have accumulated for over 50,000 wafers in the past three years.
In view of the emerging demands in advanced semiconductor technology, eMemory has been collaborating with foundries to develop Neobit OTP in HV process of next generation, meanwhile continues offering reliable design service to customers. The complete roadmap and instant technical support are the testimony of eMemory's commitment towards continuous innovation to provide cost-effective and high-performance IP solutions.
|
Related News
- 1st Silicon Selects Artisan To Develop and Deliver 0.15-Micron Libraries; Agreement Expands Relationship to Offer Free IP Via Artisan Website
- Taiwan's Etron, TSMC claim smallest low-power 8-Mbit SRAM with 0.15-micron process
- eMemory Announces Availability of Low Cost OTP Mass Production Solution - NeoROM
- eMemory Collaborates with MagnaChip to Offer One Time Programmable Macro for 0.18 um CMOS Process
- Kilopass to Provide Tower Semiconductor Silicon-Proven Field-Programmable Non-Volatile Memory for 0.18-Micron CMOS Process
Breaking News
- Silicon Proven AV1 Decoder IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
- Cadence Enables Next-Gen AI and HPC Systems with Industry's Fastest HBM4 12.8Gbps IP Memory System Solution
- S2C and Andes Technology Announce FPGA-Based Prototyping Partnership to Accelerate Advanced RISC-V SoC Development
- PQShield launches UltraPQ-Suite for deeply specialized implementations of post-quantum cryptography
- Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
Most Popular
- Certus Semiconductor Joins TSMC IP Alliance Program to Enhance Custom I/O and ESD Solutions
- Cadence to Acquire Arm Artisan Foundation IP Business
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New Breakthroughs in China's RISC-V Chip Industry
- Ceva Neural Processing Unit IP for Edge AI Selected by Nextchip for Next-Generation ADAS Solutions
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |