1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (22nm)
MoSys Launches 65nm Macro Program
Signs First 65nm Technology Licensing Agreement with Major IDM and Initiates CLASSIC Macro Designs with Pure-Play Foundries
SUNNYVALE, Calif.--Aug. 2, 2006--MoSys, Inc., the industry's leading provider of high-density System-on-Chip (SoC) embedded memory solutions announced today that it has completed the basic research and development work for porting MoSys' 1T-SRAM® embedded memory technology to the advanced 65nm semiconductor technology node and has initiated macro design work in order to move these designs into high volume consumer SoC's.
Among these initiatives, the company has signed the first 65nm technology license and royalty agreement with a major integrated device manufacturer (IDM). This agreement, which was expected to sign in the second quarter, has now been completed.
Additionally, design work has begun to create 65nm implementations of the pre-configured CLASSIC Macro product line with leading Pure-Play Foundries.
"The density and power advantages of our 1T-SRAM technology continue to improve as we scale to smaller geometries like 65nm," mentioned Chet Silvestri, Chief Executive Officer of MoSys, "and we are pleased to be working with industry-leading semiconductor manufacturers in order to make our 65nm implementations available to SoC designers."
About MoSys Inc.
Founded in 1991, MoSys, develops, licenses and markets innovative memory technologies for semiconductors. MoSys' patented 1T-SRAM technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM memory results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technologies also offer the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, these technologies can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making them ideal for embedding large memories in System-on-Chip (SoC) designs. MoSys' licensees have shipped more than 100 million chips incorporating 1T-SRAM embedded memory technologies, demonstrating excellent manufacturability in a wide range of silicon processes and applications. MoSys is headquartered at 755 N. Mathilda Avenue, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
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